Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

1 files changed, 47 insertions, 47 deletions

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 6eec8171a44e..ac0d1a73ac22 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -27,14 +27,14 @@
 #include "drmP.h"
 #include "drm.h"
 #include "i915_drm.h"
-#include "i915_drv.h"
+#include "intel_drv.h"
 
 static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         u32     dpll_reg;
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B;
         } else {
                 dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B;
@@ -53,7 +53,7 @@ static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
         if (!i915_pipe_enabled(dev, pipe))
                 return;
 
-        if (IS_IGDNG(dev))
+        if (IS_IRONLAKE(dev))
                 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
 
         if (pipe == PIPE_A)
@@ -75,7 +75,7 @@ static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
         if (!i915_pipe_enabled(dev, pipe))
                 return;
 
-        if (IS_IGDNG(dev))
+        if (IS_IRONLAKE(dev))
                 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
 
         if (pipe == PIPE_A)
@@ -239,7 +239,7 @@ static void i915_save_modeset_reg(struct drm_device *dev)
         if (drm_core_check_feature(dev, DRIVER_MODESET))
                 return;
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->savePCH_DREF_CONTROL = I915_READ(PCH_DREF_CONTROL);
                 dev_priv->saveDISP_ARB_CTL = I915_READ(DISP_ARB_CTL);
         }
@@ -247,7 +247,7 @@ static void i915_save_modeset_reg(struct drm_device *dev)
         /* Pipe & plane A info */
         dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
         dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->saveFPA0 = I915_READ(PCH_FPA0);
                 dev_priv->saveFPA1 = I915_READ(PCH_FPA1);
                 dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A);
@@ -256,7 +256,7 @@ static void i915_save_modeset_reg(struct drm_device *dev)
                 dev_priv->saveFPA1 = I915_READ(FPA1);
                 dev_priv->saveDPLL_A = I915_READ(DPLL_A);
         }
-        if (IS_I965G(dev) && !IS_IGDNG(dev))
+        if (IS_I965G(dev) && !IS_IRONLAKE(dev))
                 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
         dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
         dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
@@ -264,10 +264,10 @@ static void i915_save_modeset_reg(struct drm_device *dev)
         dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
         dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
         dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
-        if (!IS_IGDNG(dev))
+        if (!IS_IRONLAKE(dev))
                 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->savePIPEA_DATA_M1 = I915_READ(PIPEA_DATA_M1);
                 dev_priv->savePIPEA_DATA_N1 = I915_READ(PIPEA_DATA_N1);
                 dev_priv->savePIPEA_LINK_M1 = I915_READ(PIPEA_LINK_M1);
@@ -304,7 +304,7 @@ static void i915_save_modeset_reg(struct drm_device *dev)
         /* Pipe & plane B info */
         dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
         dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->saveFPB0 = I915_READ(PCH_FPB0);
                 dev_priv->saveFPB1 = I915_READ(PCH_FPB1);
                 dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B);
@@ -313,7 +313,7 @@ static void i915_save_modeset_reg(struct drm_device *dev)
                 dev_priv->saveFPB1 = I915_READ(FPB1);
                 dev_priv->saveDPLL_B = I915_READ(DPLL_B);
         }
-        if (IS_I965G(dev) && !IS_IGDNG(dev))
+        if (IS_I965G(dev) && !IS_IRONLAKE(dev))
                 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
         dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
         dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
@@ -321,10 +321,10 @@ static void i915_save_modeset_reg(struct drm_device *dev)
         dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
         dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
         dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
-        if (!IS_IGDNG(dev))
+        if (!IS_IRONLAKE(dev))
                 dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B);
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->savePIPEB_DATA_M1 = I915_READ(PIPEB_DATA_M1);
                 dev_priv->savePIPEB_DATA_N1 = I915_READ(PIPEB_DATA_N1);
                 dev_priv->savePIPEB_LINK_M1 = I915_READ(PIPEB_LINK_M1);
@@ -369,7 +369,7 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
         if (drm_core_check_feature(dev, DRIVER_MODESET))
                 return;
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dpll_a_reg = PCH_DPLL_A;
                 dpll_b_reg = PCH_DPLL_B;
                 fpa0_reg = PCH_FPA0;
@@ -385,7 +385,7 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
                 fpb1_reg = FPB1;
         }
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 I915_WRITE(PCH_DREF_CONTROL, dev_priv->savePCH_DREF_CONTROL);
                 I915_WRITE(DISP_ARB_CTL, dev_priv->saveDISP_ARB_CTL);
         }
@@ -402,7 +402,7 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
         /* Actually enable it */
         I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);
         DRM_UDELAY(150);
-        if (IS_I965G(dev) && !IS_IGDNG(dev))
+        if (IS_I965G(dev) && !IS_IRONLAKE(dev))
                 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
         DRM_UDELAY(150);
 
@@ -413,10 +413,10 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
         I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
         I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
         I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
-        if (!IS_IGDNG(dev))
+        if (!IS_IRONLAKE(dev))
                 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 I915_WRITE(PIPEA_DATA_M1, dev_priv->savePIPEA_DATA_M1);
                 I915_WRITE(PIPEA_DATA_N1, dev_priv->savePIPEA_DATA_N1);
                 I915_WRITE(PIPEA_LINK_M1, dev_priv->savePIPEA_LINK_M1);
@@ -467,7 +467,7 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
         /* Actually enable it */
         I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);
         DRM_UDELAY(150);
-        if (IS_I965G(dev) && !IS_IGDNG(dev))
+        if (IS_I965G(dev) && !IS_IRONLAKE(dev))
                 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
         DRM_UDELAY(150);
 
@@ -478,10 +478,10 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
         I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
         I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
         I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
-        if (!IS_IGDNG(dev))
+        if (!IS_IRONLAKE(dev))
                 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 I915_WRITE(PIPEB_DATA_M1, dev_priv->savePIPEB_DATA_M1);
                 I915_WRITE(PIPEB_DATA_N1, dev_priv->savePIPEB_DATA_N1);
                 I915_WRITE(PIPEB_LINK_M1, dev_priv->savePIPEB_LINK_M1);
@@ -546,14 +546,14 @@ void i915_save_display(struct drm_device *dev)
                 dev_priv->saveCURSIZE = I915_READ(CURSIZE);
 
         /* CRT state */
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->saveADPA = I915_READ(PCH_ADPA);
         } else {
                 dev_priv->saveADPA = I915_READ(ADPA);
         }
 
         /* LVDS state */
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
                 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
                 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2);
@@ -571,10 +571,10 @@ void i915_save_display(struct drm_device *dev)
                         dev_priv->saveLVDS = I915_READ(LVDS);
         }
 
-        if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
+        if (!IS_I830(dev) && !IS_845G(dev) && !IS_IRONLAKE(dev))
                 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
                 dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
                 dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
@@ -614,7 +614,7 @@ void i915_save_display(struct drm_device *dev)
         dev_priv->saveVGA0 = I915_READ(VGA0);
         dev_priv->saveVGA1 = I915_READ(VGA1);
         dev_priv->saveVGA_PD = I915_READ(VGA_PD);
-        if (IS_IGDNG(dev))
+        if (IS_IRONLAKE(dev))
                 dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
         else
                 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
@@ -656,24 +656,24 @@ void i915_restore_display(struct drm_device *dev)
                 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
 
         /* CRT state */
-        if (IS_IGDNG(dev))
+        if (IS_IRONLAKE(dev))
                 I915_WRITE(PCH_ADPA, dev_priv->saveADPA);
         else
                 I915_WRITE(ADPA, dev_priv->saveADPA);
 
         /* LVDS state */
-        if (IS_I965G(dev) && !IS_IGDNG(dev))
+        if (IS_I965G(dev) && !IS_IRONLAKE(dev))
                 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 I915_WRITE(PCH_LVDS, dev_priv->saveLVDS);
         } else if (IS_MOBILE(dev) && !IS_I830(dev))
                 I915_WRITE(LVDS, dev_priv->saveLVDS);
 
-        if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
+        if (!IS_I830(dev) && !IS_845G(dev) && !IS_IRONLAKE(dev))
                 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
 
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL);
                 I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2);
                 I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL);
@@ -682,6 +682,8 @@ void i915_restore_display(struct drm_device *dev)
                 I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
                 I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);
                 I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL);
+                I915_WRITE(MCHBAR_RENDER_STANDBY,
+                           dev_priv->saveMCHBAR_RENDER_STANDBY);
         } else {
                 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
                 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
@@ -713,7 +715,7 @@ void i915_restore_display(struct drm_device *dev)
         }
 
         /* VGA state */
-        if (IS_IGDNG(dev))
+        if (IS_IRONLAKE(dev))
                 I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
         else
                 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
@@ -732,31 +734,28 @@ int i915_save_state(struct drm_device *dev)
 
         pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
 
-        /* Render Standby */
-        if (IS_I965G(dev) && IS_MOBILE(dev))
-                dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY);
-
         /* Hardware status page */
         dev_priv->saveHWS = I915_READ(HWS_PGA);
 
         i915_save_display(dev);
 
         /* Interrupt state */
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 dev_priv->saveDEIER = I915_READ(DEIER);
                 dev_priv->saveDEIMR = I915_READ(DEIMR);
                 dev_priv->saveGTIER = I915_READ(GTIER);
                 dev_priv->saveGTIMR = I915_READ(GTIMR);
                 dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR);
                 dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR);
+                dev_priv->saveMCHBAR_RENDER_STANDBY =
+                        I915_READ(MCHBAR_RENDER_STANDBY);
         } else {
                 dev_priv->saveIER = I915_READ(IER);
                 dev_priv->saveIMR = I915_READ(IMR);
         }
 
-        /* Clock gating state */
-        dev_priv->saveD_STATE = I915_READ(D_STATE);
-        dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Not sure about this */
+        if (IS_IRONLAKE_M(dev))
+                ironlake_disable_drps(dev);
 
         /* Cache mode state */
         dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
@@ -795,10 +794,6 @@ int i915_restore_state(struct drm_device *dev)
 
         pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
 
-        /* Render Standby */
-        if (IS_I965G(dev) && IS_MOBILE(dev))
-                I915_WRITE(MCHBAR_RENDER_STANDBY, dev_priv->saveRENDERSTANDBY);
-
         /* Hardware status page */
         I915_WRITE(HWS_PGA, dev_priv->saveHWS);
 
@@ -817,7 +812,7 @@ int i915_restore_state(struct drm_device *dev)
         i915_restore_display(dev);
 
         /* Interrupt state */
-        if (IS_IGDNG(dev)) {
+        if (IS_IRONLAKE(dev)) {
                 I915_WRITE(DEIER, dev_priv->saveDEIER);
                 I915_WRITE(DEIMR, dev_priv->saveDEIMR);
                 I915_WRITE(GTIER, dev_priv->saveGTIER);
@@ -830,8 +825,10 @@ int i915_restore_state(struct drm_device *dev)
         }
 
         /* Clock gating state */
-        I915_WRITE (D_STATE, dev_priv->saveD_STATE);
-        I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
+        intel_init_clock_gating(dev);
+
+        if (IS_IRONLAKE_M(dev))
+                ironlake_enable_drps(dev);
 
         /* Cache mode state */
         I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
@@ -846,6 +843,9 @@ int i915_restore_state(struct drm_device *dev)
         for (i = 0; i < 3; i++)
                 I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
 
+        /* I2C state */
+        intel_i2c_reset_gmbus(dev);
+
         return 0;
 }