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authorJesse Barnes <jbarnes@virtuousgeek.org>2013-04-02 14:23:05 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-04-02 15:00:06 -0400
commita0e4e199ad18070e17d15b920a39c6ec9d95b793 (patch)
tree269f1c328d220ee13596f509d6191762f709cde9 /drivers/gpu/drm/i915/i915_reg.h
parent453c542059cfa1988cabcf84f715307cd9789163 (diff)
drm/i915: add Punit read/write routines for VLV v2
Slightly different than other platforms. v2 [Jani]: Fix IOSF_BYTE_ENABLES_SHIFT shift. Use common routine. v3: drop turbo defines from this patch (Ville) use PCI_DEVFN(2,0) instead of open coding (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> [danvet: Add checkpatch bikeshed about missing space.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 37663696a56b..058686c0dbbf 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4381,6 +4381,20 @@
4381#define GEN6_PCODE_DATA 0x138128 4381#define GEN6_PCODE_DATA 0x138128
4382#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8 4382#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
4383 4383
4384#define VLV_IOSF_DOORBELL_REQ 0x182100
4385#define IOSF_DEVFN_SHIFT 24
4386#define IOSF_OPCODE_SHIFT 16
4387#define IOSF_PORT_SHIFT 8
4388#define IOSF_BYTE_ENABLES_SHIFT 4
4389#define IOSF_BAR_SHIFT 1
4390#define IOSF_SB_BUSY (1<<0)
4391#define IOSF_PORT_PUNIT 0x4
4392#define VLV_IOSF_DATA 0x182104
4393#define VLV_IOSF_ADDR 0x182108
4394
4395#define PUNIT_OPCODE_REG_READ 6
4396#define PUNIT_OPCODE_REG_WRITE 7
4397
4384#define GEN6_GT_CORE_STATUS 0x138060 4398#define GEN6_GT_CORE_STATUS 0x138060
4385#define GEN6_CORE_CPD_STATE_MASK (7<<4) 4399#define GEN6_CORE_CPD_STATE_MASK (7<<4)
4386#define GEN6_RCn_MASK 7 4400#define GEN6_RCn_MASK 7