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authorEric Anholt <eric@anholt.net>2011-11-07 19:07:04 -0500
committerKeith Packard <keithp@keithp.com>2011-11-07 22:25:15 -0500
commit406478dc911e16677fbd9c84d1d50cdffbc031ab (patch)
treedccb7db94e10333a3526d54c182d8d80df2ff582 /drivers/gpu/drm/i915/i915_reg.h
parent680da876f44a644aee891e1d0df5a560cfa4720e (diff)
drm/i915: Turn on a required 3D clock gating bit on Sandybridge.
Fixes rendering failures in Unigine Tropics and Sanctuary and the mesa "fire" demo. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5a09416e611f..b807275ea739 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3444,6 +3444,9 @@
3444#define GT_FIFO_FREE_ENTRIES 0x120008 3444#define GT_FIFO_FREE_ENTRIES 0x120008
3445#define GT_FIFO_NUM_RESERVED_ENTRIES 20 3445#define GT_FIFO_NUM_RESERVED_ENTRIES 20
3446 3446
3447#define GEN6_UCGCTL2 0x9404
3448# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12)
3449
3447#define GEN6_RPNSWREQ 0xA008 3450#define GEN6_RPNSWREQ 0xA008
3448#define GEN6_TURBO_DISABLE (1<<31) 3451#define GEN6_TURBO_DISABLE (1<<31)
3449#define GEN6_FREQUENCY(x) ((x)<<25) 3452#define GEN6_FREQUENCY(x) ((x)<<25)