diff options
author | Deepak S <deepak.s@linux.intel.com> | 2014-08-21 23:02:40 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-09-03 05:04:15 -0400 |
commit | 9a2d2d8708208d983cb6101d58645537f7123a04 (patch) | |
tree | afe6d76e44f35bd15ecad7ac0a544a88c992edae /drivers/gpu/drm/i915/i915_irq.c | |
parent | 671b50134ccd75a5dd1584e306a9316587371af3 (diff) |
drm/i915: Fix to Enable GT/PM Interrupts
Programing GT IER interrupts was fumbled while enabling Interrupts for
gen8
We forgot to program PM IER interrupt in gen8_gt_irq_postinstall based
on the new re-worked interrupt routines.
v2: Kill the loop and init GT interrupts individually (Ville)
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Adjust commit message as per discussion with Deepak.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 8883a48c08b9..c1186e1ba48f 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -3799,8 +3799,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev) | |||
3799 | 3799 | ||
3800 | static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) | 3800 | static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) |
3801 | { | 3801 | { |
3802 | int i; | ||
3803 | |||
3804 | /* These are interrupts we'll toggle with the ring mask register */ | 3802 | /* These are interrupts we'll toggle with the ring mask register */ |
3805 | uint32_t gt_interrupts[] = { | 3803 | uint32_t gt_interrupts[] = { |
3806 | GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT | | 3804 | GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT | |
@@ -3817,10 +3815,11 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) | |||
3817 | GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT | 3815 | GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT |
3818 | }; | 3816 | }; |
3819 | 3817 | ||
3820 | for (i = 0; i < ARRAY_SIZE(gt_interrupts); i++) | ||
3821 | GEN8_IRQ_INIT_NDX(GT, i, ~gt_interrupts[i], gt_interrupts[i]); | ||
3822 | |||
3823 | dev_priv->pm_irq_mask = 0xffffffff; | 3818 | dev_priv->pm_irq_mask = 0xffffffff; |
3819 | GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]); | ||
3820 | GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]); | ||
3821 | GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, dev_priv->pm_rps_events); | ||
3822 | GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]); | ||
3824 | } | 3823 | } |
3825 | 3824 | ||
3826 | static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) | 3825 | static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) |