drm/i915: Make sprite updates atomic

Add a mechanism by which we can evade the leading edge of vblank. This
guarantees that no two sprite register writes will straddle on either
side of the vblank start, and that means all the writes will be latched
together in one atomic operation.

We do the vblank evade by checking the scanline counter, and if it's too
close to the start of vblank (too close has been hardcoded to 100usec
for now), we will wait for the vblank start to pass. In order to
eliminate random delayes from the rest of the system, we operate with
interrupts disabled, except when waiting for the vblank obviously.

Note that we now go digging through pipe_to_crtc_mapping[] in the
vblank interrupt handler, which is a bit dangerous since we set up
interrupts before the crtcs. However in this case since it's the vblank
interrupt, we don't actually unmask it until some piece of code
requests it.

v2: preempt_check_resched() calls after local_irq_enable() (Jesse)
    Hook up the vblank irq stuff on BDW as well
v3: Pass intel_crtc instead of drm_crtc (Daniel)
    Warn if crtc.mutex isn't locked (Daniel)
    Add an explicit compiler barrier and document the barriers (Daniel)
    Note the irq vs. modeset setup madness in the commit message (Daniel)
v4: Use prepare_to_wait() & co. directly and eliminate vbl_received
v5: Refactor intel_pipe_handle_vblank() vs. drm_handle_vblank() (Chris)
    Check for min/max scanline <= 0 (Chris)
    Don't call intel_pipe_update_end() if start failed totally (Chris)
    Check that the vblank counters match on both sides of the critical
    section (Chris)
v6: Fix atomic update for interlaced modes
v7: Reorder code for better readability (Chris)
v8: Drop preempt_check_resched(). It's not available to modules
    anymore and isn't even needed unless we ourselves cause
    a wakeup needing reschedule while interrupts are off

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Sourab Gupta <sourabgupta@gmail.com>
Reviewed-by: Akash Goel <akash.goels@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 19 insertions, 6 deletions

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1e60f24736da..2d7618366b75 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1556,6 +1556,19 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
         }
 }
 
+static bool intel_pipe_handle_vblank(struct drm_device *dev, enum pipe pipe)
+{
+        struct intel_crtc *crtc;
+
+        if (!drm_handle_vblank(dev, pipe))
+                return false;
+
+        crtc = to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
+        wake_up(&crtc->vbl_wait);
+
+        return true;
+}
+
 static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1607,7 +1620,7 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
 
         for_each_pipe(pipe) {
                 if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
-                        drm_handle_vblank(dev, pipe);
+                        intel_pipe_handle_vblank(dev, pipe);
 
                 if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV) {
                         intel_prepare_page_flip(dev, pipe);
@@ -1850,7 +1863,7 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
 
         for_each_pipe(pipe) {
                 if (de_iir & DE_PIPE_VBLANK(pipe))
-                        drm_handle_vblank(dev, pipe);
+                        intel_pipe_handle_vblank(dev, pipe);
 
                 if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
                         if (intel_set_cpu_fifo_underrun_reporting(dev, pipe, false))
@@ -1900,7 +1913,7 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
 
         for_each_pipe(pipe) {
                 if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)))
-                        drm_handle_vblank(dev, pipe);
+                        intel_pipe_handle_vblank(dev, pipe);
 
                 /* plane/pipes map 1:1 on ilk+ */
                 if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe)) {
@@ -2043,7 +2056,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 
                 pipe_iir = I915_READ(GEN8_DE_PIPE_IIR(pipe));
                 if (pipe_iir & GEN8_PIPE_VBLANK)
-                        drm_handle_vblank(dev, pipe);
+                        intel_pipe_handle_vblank(dev, pipe);
 
                 if (pipe_iir & GEN8_PIPE_PRIMARY_FLIP_DONE) {
                         intel_prepare_page_flip(dev, pipe);
@@ -3390,7 +3403,7 @@ static bool i8xx_handle_vblank(struct drm_device *dev,
         struct drm_i915_private *dev_priv = dev->dev_private;
         u16 flip_pending = DISPLAY_PLANE_FLIP_PENDING(plane);
 
-        if (!drm_handle_vblank(dev, pipe))
+        if (!intel_pipe_handle_vblank(dev, pipe))
                 return false;
 
         if ((iir & flip_pending) == 0)
@@ -3575,7 +3588,7 @@ static bool i915_handle_vblank(struct drm_device *dev,
         struct drm_i915_private *dev_priv = dev->dev_private;
         u32 flip_pending = DISPLAY_PLANE_FLIP_PENDING(plane);
 
-        if (!drm_handle_vblank(dev, pipe))
+        if (!intel_pipe_handle_vblank(dev, pipe))
                 return false;
 
         if ((iir & flip_pending) == 0)