aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gem_execbuffer.c
diff options
context:
space:
mode:
authorDave Airlie <airlied@redhat.com>2013-06-27 19:50:34 -0400
committerDave Airlie <airlied@redhat.com>2013-06-27 19:50:34 -0400
commit28419261b09aa3a5118647b1ed93809ca97c5354 (patch)
tree5098381ee695009fce1fa4a25ba34d487eb4f35e /drivers/gpu/drm/i915/i915_gem_execbuffer.c
parent4a009085978de90db40f9f38bcfad501f86ca959 (diff)
parent854c94a7854a4fabdd7db451cf1774e6dcba6bab (diff)
Merge tag 'drm-intel-next-2013-06-18' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Last 3.11 feature pull. I have a few odds bits and pieces and fixes in my queue, I'll sort them out later on to see what's for 3.11-fixes and what's for 3.12. But nothing to hold this here up imo. Highlights: - more hangcheck work from Mika and Chris to prepare for arb robustness - trickle feed fixes from Ville - first parts of the shared pch pll rework, with some basic hw state readout and cross-checking (this shuts up the confused pch pll refcount WARN that Linus just recently forwarded) - Haswell audio power well support from Wang Xingchao (alsa bits acked by Takashi) - some cleanups and asserts sprinkling around the plane/gamma enabling sequence from Ville - more gtt refactoring from Ben - clear up the adjusted->mode vs. pixel clock vs. port clock confusion - 30bpp support, this time for real hopefully * tag 'drm-intel-next-2013-06-18' of git://people.freedesktop.org/~danvet/drm-intel: (97 commits) drm/i915: remove a superflous semi-colon drm/i915: Kill useless "Enable panel fitter" comments drm/i915: Remove extra "ring" from error message drm/i915: simplify the reduced clock handling for pch plls drm/i915: stop killing pfit on i9xx drm/i915: explicitly set up PIPECONF (and gamma table) on haswell drm/i915: set up PIPECONF explicitly for i9xx/vlv platforms drm/i915: set up PIPECONF explicitly on ilk-ivb drm/i915: find guilty batch buffer on ring resets drm/i915: store ring hangcheck action drm/i915: add batch bo to i915_add_request() drm/i915: change i915_add_request to macro drm/i915: add i915_gem_context_get_hang_stats() drm/i915: add struct i915_ctx_hang_stats drm/i915: Try harder to disable trickle feed on VLV drm/i915: fix up pch pll enabling for pixel multipliers drm/i915: hw state readout and cross-checking for shared dplls drm/i915: WARN on lack of shared dpll drm/i915: split up intel_modeset_check_state drm/i915: extract readout_hw_state from setup_hw_state ... Conflicts: drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_fb.c drivers/gpu/drm/i915/intel_sdvo.c
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_execbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_execbuffer.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index a8bb62ca8756..87a3227e5179 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -786,7 +786,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,
786 obj->dirty = 1; 786 obj->dirty = 1;
787 obj->last_write_seqno = intel_ring_get_seqno(ring); 787 obj->last_write_seqno = intel_ring_get_seqno(ring);
788 if (obj->pin_count) /* check for potential scanout */ 788 if (obj->pin_count) /* check for potential scanout */
789 intel_mark_fb_busy(obj); 789 intel_mark_fb_busy(obj, ring);
790 } 790 }
791 791
792 trace_i915_gem_object_change_domain(obj, old_read, old_write); 792 trace_i915_gem_object_change_domain(obj, old_read, old_write);
@@ -796,13 +796,14 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,
796static void 796static void
797i915_gem_execbuffer_retire_commands(struct drm_device *dev, 797i915_gem_execbuffer_retire_commands(struct drm_device *dev,
798 struct drm_file *file, 798 struct drm_file *file,
799 struct intel_ring_buffer *ring) 799 struct intel_ring_buffer *ring,
800 struct drm_i915_gem_object *obj)
800{ 801{
801 /* Unconditionally force add_request to emit a full flush. */ 802 /* Unconditionally force add_request to emit a full flush. */
802 ring->gpu_caches_dirty = true; 803 ring->gpu_caches_dirty = true;
803 804
804 /* Add a breadcrumb for the completion of the batch buffer */ 805 /* Add a breadcrumb for the completion of the batch buffer */
805 (void)i915_add_request(ring, file, NULL); 806 (void)__i915_add_request(ring, file, obj, NULL);
806} 807}
807 808
808static int 809static int
@@ -1083,7 +1084,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
1083 trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags); 1084 trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1084 1085
1085 i915_gem_execbuffer_move_to_active(&eb->objects, ring); 1086 i915_gem_execbuffer_move_to_active(&eb->objects, ring);
1086 i915_gem_execbuffer_retire_commands(dev, file, ring); 1087 i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1087 1088
1088err: 1089err:
1089 eb_destroy(eb); 1090 eb_destroy(eb);