diff options
author | Dave Airlie <airlied@redhat.com> | 2012-02-07 10:29:04 -0500 |
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committer | Dave Airlie <airlied@redhat.com> | 2012-02-07 10:29:04 -0500 |
commit | 198ceac091049003ffcc4b7cda76785510fc3b59 (patch) | |
tree | c38ebdd90a52bae47a1811ab879f2108ad728670 /drivers/gpu/drm/i915/i915_gem.c | |
parent | 83b316fdafcc37e3e65b4a650afb7aab5cc2d271 (diff) | |
parent | 3d29b842e58fbca2c13a9f458fddbaa535c6e578 (diff) |
Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next
* 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel:
drm/i915: add a LLC feature flag in device description
drm/i915: kill i915_mem.c
drm/i915: Use kcalloc instead of kzalloc to allocate array
drm/i915/dp: Check for AUXCH error before checking for success
drm/i915/dp: Use auxch precharge value of 5 everywhere
drm/i915/dp: Tweak auxch clock divider for PCH
drm/i915: Remove a comment about PCH from the non-PCH path
drm/i915: Fix assert_pch_hdmi_disabled to mention HDMI (not DP)
drm/i915: Implement plane-disabled assertion for PCH too
drivers: i915: Fix BLC PWM register setup
drm/i915: Check that plane/pipe is disabled before removing the fb
drm/i915: fix typo in function name
drm/i915: split out pll divider code
drm/i915: split 9xx refclk & sdvo tv code out
agp/intel: Add pci id for hostbridge from has/qemu
drm/i915: there is no pipe CxSR on ironlake
drm/i915: Only look for matching clocks for LVDS downclock
drm/i915: Silence _DSM errors
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index e55badb2d86d..eb98a7f55cfe 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -3619,8 +3619,8 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev, | |||
3619 | obj->base.write_domain = I915_GEM_DOMAIN_CPU; | 3619 | obj->base.write_domain = I915_GEM_DOMAIN_CPU; |
3620 | obj->base.read_domains = I915_GEM_DOMAIN_CPU; | 3620 | obj->base.read_domains = I915_GEM_DOMAIN_CPU; |
3621 | 3621 | ||
3622 | if (IS_GEN6(dev) || IS_GEN7(dev)) { | 3622 | if (HAS_LLC(dev)) { |
3623 | /* On Gen6, we can have the GPU use the LLC (the CPU | 3623 | /* On some devices, we can have the GPU use the LLC (the CPU |
3624 | * cache) for about a 10% performance improvement | 3624 | * cache) for about a 10% performance improvement |
3625 | * compared to uncached. Graphics requests other than | 3625 | * compared to uncached. Graphics requests other than |
3626 | * display scanout are coherent with the CPU in | 3626 | * display scanout are coherent with the CPU in |