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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-29 09:59:36 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-12-06 08:37:01 -0500
commite69d0bc1c67520c302e070ac078975ea9c786de8 (patch)
tree46b534c9332f59acd373c0c326b3278392c703eb /drivers/gpu/drm/i915/i915_drv.h
parent2f0c2ad18b88691496e23d1ddbc2d0af8f6df5fa (diff)
drm/i915: extract common link_m_n helpers
Both the dp and fdi code use the exact same computations (ignore minor differences in conversion between bits and bytes). This makes it even more apparent that we have a _massive_ mess between cpu transcoder/fdi link/pch transcoder and pch link settings. And also that we have hilarious amounts of confusion between edp and dp (despite that they're identical at a link level). Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a00ee3da632f..e9ac3603fbdb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -107,6 +107,19 @@ struct intel_pch_pll {
107}; 107};
108#define I915_NUM_PLLS 2 108#define I915_NUM_PLLS 2
109 109
110/* Used by dp and fdi links */
111struct intel_link_m_n {
112 uint32_t tu;
113 uint32_t gmch_m;
114 uint32_t gmch_n;
115 uint32_t link_m;
116 uint32_t link_n;
117};
118
119void intel_link_compute_m_n(int bpp, int nlanes,
120 int pixel_clock, int link_clock,
121 struct intel_link_m_n *m_n);
122
110struct intel_ddi_plls { 123struct intel_ddi_plls {
111 int spll_refcount; 124 int spll_refcount;
112 int wrpll1_refcount; 125 int wrpll1_refcount;