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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2014-03-07 18:08:18 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-03-19 11:40:30 -0400
commit765dab67528ac2490d8a9f68d05cc678861584d6 (patch)
tree8ba6728aef927b570efaae6f004d5a4e4df90405 /drivers/gpu/drm/i915/i915_drv.h
parenta14cb6fc851d09bdb2c95f26d81842d5b4fa7164 (diff)
drm/i915: update the PC8 and runtime PM documentation
Now that PC8 got much simpler, there are less things to document. Also, runtime PM already has a nice documentation, so we don't need to re-explain it on our driver. v2: - Rebase. - Fix typo (Jesse). Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h52
1 files changed, 12 insertions, 40 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 20db5d804e20..9cd870fb1472 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1337,47 +1337,19 @@ struct ilk_wm_values {
1337}; 1337};
1338 1338
1339/* 1339/*
1340 * This struct tracks the state needed for the Package C8+ feature. 1340 * This struct helps tracking the state needed for runtime PM, which puts the
1341 * device in PCI D3 state. Notice that when this happens, nothing on the
1342 * graphics device works, even register access, so we don't get interrupts nor
1343 * anything else.
1341 * 1344 *
1342 * TODO: we're merging the Package C8+ feature with the runtime PM support. To 1345 * Every piece of our code that needs to actually touch the hardware needs to
1343 * avoid having to update the documentation at each patch of the series, we'll 1346 * either call intel_runtime_pm_get or call intel_display_power_get with the
1344 * do a final update at the end. 1347 * appropriate power domain.
1345 * 1348 *
1346 * Package states C8 and deeper are really deep PC states that can only be 1349 * Our driver uses the autosuspend delay feature, which means we'll only really
1347 * reached when all the devices on the system allow it, so even if the graphics 1350 * suspend if we stay with zero refcount for a certain amount of time. The
1348 * device allows PC8+, it doesn't mean the system will actually get to these 1351 * default value is currently very conservative (see intel_init_runtime_pm), but
1349 * states. 1352 * it can be changed with the standard runtime PM files from sysfs.
1350 *
1351 * Our driver only allows PC8+ when all the outputs are disabled, the power well
1352 * is disabled and the GPU is idle. When these conditions are met, we manually
1353 * do the other conditions: disable the interrupts, clocks and switch LCPLL
1354 * refclk to Fclk.
1355 *
1356 * When we really reach PC8 or deeper states (not just when we allow it) we lose
1357 * the state of some registers, so when we come back from PC8+ we need to
1358 * restore this state. We don't get into PC8+ if we're not in RC6, so we don't
1359 * need to take care of the registers kept by RC6.
1360 *
1361 * The interrupt disabling is part of the requirements. We can only leave the
1362 * PCH HPD interrupts enabled. If we're in PC8+ and we get another interrupt we
1363 * can lock the machine.
1364 *
1365 * Ideally every piece of our code that needs PC8+ disabled would call
1366 * hsw_disable_package_c8, which would increment disable_count and prevent the
1367 * system from reaching PC8+. But we don't have a symmetric way to do this for
1368 * everything, so we have the requirements_met variable. When we switch
1369 * requirements_met to true we decrease disable_count, and increase it in the
1370 * opposite case. The requirements_met variable is true when all the CRTCs,
1371 * encoders and the power well are disabled.
1372 *
1373 * In addition to everything, we only actually enable PC8+ if disable_count
1374 * stays at zero for at least some seconds. This is implemented with the
1375 * enable_work variable. We do this so we don't enable/disable PC8 dozens of
1376 * consecutive times when all screens are disabled and some background app
1377 * queries the state of our connectors, or we have some application constantly
1378 * waking up to use the GPU. Only after the enable_work function actually
1379 * enables PC8+ the "enable" variable will become true, which means that it can
1380 * be false even if disable_count is 0.
1381 * 1353 *
1382 * The irqs_disabled variable becomes true exactly after we disable the IRQs and 1354 * The irqs_disabled variable becomes true exactly after we disable the IRQs and
1383 * goes back to false exactly before we reenable the IRQs. We use this variable 1355 * goes back to false exactly before we reenable the IRQs. We use this variable
@@ -1387,7 +1359,7 @@ struct ilk_wm_values {
1387 * inside struct regsave so when we restore the IRQs they will contain the 1359 * inside struct regsave so when we restore the IRQs they will contain the
1388 * latest expected values. 1360 * latest expected values.
1389 * 1361 *
1390 * For more, read "Display Sequences for Package C8" on our documentation. 1362 * For more, read the Documentation/power/runtime_pm.txt.
1391 */ 1363 */
1392struct i915_runtime_pm { 1364struct i915_runtime_pm {
1393 bool suspended; 1365 bool suspended;