drm/i915: display pll hw state readout and checking

Currently still with an empty register state, this will follow in a
next step. This one here just creates the new vfunc and uses it for
cross-checking, initial state takeover and the dpll assert function.

And add a FIXME for the ddi pll readout code, which still needs to be
converted over.

v2:
- Add some hw state readout debug output.
- Also cross check the enabled crtc counting.

Note that I've botched up the patch ordering, and before this patch
we've read out the pll selection correctly, but did not reconstruct
the refcounts properly. See the bug link.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65673
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e5b8ae42859a..7b998dcae089 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -142,6 +142,9 @@ enum intel_dpll_id {
 };
 #define I915_NUM_PLLS 2
 
+struct intel_dpll_hw_state {
+};
+
 struct intel_shared_dpll {
         int refcount; /* count of number of CRTCs sharing this PLL */
         int active; /* count of number of active CRTCs (i.e. DPMS on) */
@@ -149,10 +152,14 @@ struct intel_shared_dpll {
         const char *name;
         /* should match the index in the dev_priv->shared_dplls array */
         enum intel_dpll_id id;
+        struct intel_dpll_hw_state hw_state;
         void (*enable)(struct drm_i915_private *dev_priv,
                        struct intel_shared_dpll *pll);
         void (*disable)(struct drm_i915_private *dev_priv,
                         struct intel_shared_dpll *pll);
+        bool (*get_hw_state)(struct drm_i915_private *dev_priv,
+                             struct intel_shared_dpll *pll,
+                             struct intel_dpll_hw_state *hw_state);
 };
 
 /* Used by dp and fdi links */