aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_dma.c
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2012-04-24 10:47:41 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-03 05:18:12 -0400
commit1070a42b6bc5cc10a33d2fe22f0b295a0194a582 (patch)
tree7cbdeb398d3c957e5d703c7cec4fc55fad7e55f2 /drivers/gpu/drm/i915/i915_dma.c
parent9797fbfbcfe251b5297b82803002c713e61aa410 (diff)
drm/i915: Move GEM initialisation from i915_dma.c to i915_gem.c
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c66
1 files changed, 1 insertions, 65 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index e3f1488b9933..9e80d5afd270 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1062,70 +1062,6 @@ static bool i915_switcheroo_can_switch(struct pci_dev *pdev)
1062 return can_switch; 1062 return can_switch;
1063} 1063}
1064 1064
1065static bool
1066intel_enable_ppgtt(struct drm_device *dev)
1067{
1068 if (i915_enable_ppgtt >= 0)
1069 return i915_enable_ppgtt;
1070
1071#ifdef CONFIG_INTEL_IOMMU
1072 /* Disable ppgtt on SNB if VT-d is on. */
1073 if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
1074 return false;
1075#endif
1076
1077 return true;
1078}
1079
1080static int i915_load_gem_init(struct drm_device *dev)
1081{
1082 struct drm_i915_private *dev_priv = dev->dev_private;
1083 unsigned long gtt_size, mappable_size;
1084 int ret;
1085
1086 gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
1087 mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
1088
1089 mutex_lock(&dev->struct_mutex);
1090 if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
1091 /* PPGTT pdes are stolen from global gtt ptes, so shrink the
1092 * aperture accordingly when using aliasing ppgtt. */
1093 gtt_size -= I915_PPGTT_PD_ENTRIES*PAGE_SIZE;
1094
1095 i915_gem_init_global_gtt(dev, 0, mappable_size, gtt_size);
1096
1097 ret = i915_gem_init_aliasing_ppgtt(dev);
1098 if (ret) {
1099 mutex_unlock(&dev->struct_mutex);
1100 return ret;
1101 }
1102 } else {
1103 /* Let GEM Manage all of the aperture.
1104 *
1105 * However, leave one page at the end still bound to the scratch
1106 * page. There are a number of places where the hardware
1107 * apparently prefetches past the end of the object, and we've
1108 * seen multiple hangs with the GPU head pointer stuck in a
1109 * batchbuffer bound at the last page of the aperture. One page
1110 * should be enough to keep any prefetching inside of the
1111 * aperture.
1112 */
1113 i915_gem_init_global_gtt(dev, 0, mappable_size,
1114 gtt_size);
1115 }
1116
1117 ret = i915_gem_init_hw(dev);
1118 mutex_unlock(&dev->struct_mutex);
1119 if (ret) {
1120 i915_gem_cleanup_aliasing_ppgtt(dev);
1121 return ret;
1122 }
1123
1124 /* Allow hardware batchbuffers unless told otherwise. */
1125 dev_priv->allow_batchbuffer = 1;
1126 return 0;
1127}
1128
1129static int i915_load_modeset_init(struct drm_device *dev) 1065static int i915_load_modeset_init(struct drm_device *dev)
1130{ 1066{
1131 struct drm_i915_private *dev_priv = dev->dev_private; 1067 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1168,7 +1104,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
1168 1104
1169 intel_modeset_init(dev); 1105 intel_modeset_init(dev);
1170 1106
1171 ret = i915_load_gem_init(dev); 1107 ret = i915_gem_init(dev);
1172 if (ret) 1108 if (ret)
1173 goto cleanup_gem_stolen; 1109 goto cleanup_gem_stolen;
1174 1110