diff options
author | Rodrigo Vivi <rodrigo.vivi@gmail.com> | 2013-10-03 15:15:06 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-10-03 15:20:09 -0400 |
commit | a031d709bb90ce72cc016d242e8c1fef65ae9d5c (patch) | |
tree | 0740074f270dc9fed3c8da247d99eef3ff671cd2 /drivers/gpu/drm/i915/i915_debugfs.c | |
parent | dd75fdc8c69587c91bd68a6ed7c726b5e70f9399 (diff) |
drm/i915: Simplify PSR debugfs
for igt test case.
v2: remove trailing spaces and fix conflicts
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
[danvet:
- make it comipile
- s/IS_HASWELL/HAS_PSR/]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 129 |
1 files changed, 11 insertions, 118 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index bc5c04d5890f..61fd61969e21 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1666,127 +1666,20 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) | |||
1666 | struct drm_info_node *node = m->private; | 1666 | struct drm_info_node *node = m->private; |
1667 | struct drm_device *dev = node->minor->dev; | 1667 | struct drm_device *dev = node->minor->dev; |
1668 | struct drm_i915_private *dev_priv = dev->dev_private; | 1668 | struct drm_i915_private *dev_priv = dev->dev_private; |
1669 | u32 psrstat, psrperf; | 1669 | u32 psrperf = 0; |
1670 | bool enabled = false; | ||
1670 | 1671 | ||
1671 | if (!HAS_PSR(dev)) { | 1672 | seq_printf(m, "Sink_Support: %s\n", yesno(dev_priv->psr.sink_support)); |
1672 | seq_puts(m, "PSR not supported on this platform\n"); | 1673 | seq_printf(m, "Source_OK: %s\n", yesno(dev_priv->psr.source_ok)); |
1673 | } else if (HAS_PSR(dev) && | ||
1674 | I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE) { | ||
1675 | seq_puts(m, "PSR enabled\n"); | ||
1676 | } else { | ||
1677 | seq_puts(m, "PSR disabled: "); | ||
1678 | switch (dev_priv->no_psr_reason) { | ||
1679 | case PSR_NO_SOURCE: | ||
1680 | seq_puts(m, "not supported on this platform"); | ||
1681 | break; | ||
1682 | case PSR_NO_SINK: | ||
1683 | seq_puts(m, "not supported by panel"); | ||
1684 | break; | ||
1685 | case PSR_MODULE_PARAM: | ||
1686 | seq_puts(m, "disabled by flag"); | ||
1687 | break; | ||
1688 | case PSR_CRTC_NOT_ACTIVE: | ||
1689 | seq_puts(m, "crtc not active"); | ||
1690 | break; | ||
1691 | case PSR_PWR_WELL_ENABLED: | ||
1692 | seq_puts(m, "power well enabled"); | ||
1693 | break; | ||
1694 | case PSR_NOT_TILED: | ||
1695 | seq_puts(m, "not tiled"); | ||
1696 | break; | ||
1697 | case PSR_SPRITE_ENABLED: | ||
1698 | seq_puts(m, "sprite enabled"); | ||
1699 | break; | ||
1700 | case PSR_S3D_ENABLED: | ||
1701 | seq_puts(m, "stereo 3d enabled"); | ||
1702 | break; | ||
1703 | case PSR_INTERLACED_ENABLED: | ||
1704 | seq_puts(m, "interlaced enabled"); | ||
1705 | break; | ||
1706 | case PSR_HSW_NOT_DDIA: | ||
1707 | seq_puts(m, "HSW ties PSR to DDI A (eDP)"); | ||
1708 | break; | ||
1709 | default: | ||
1710 | seq_puts(m, "unknown reason"); | ||
1711 | } | ||
1712 | seq_puts(m, "\n"); | ||
1713 | return 0; | ||
1714 | } | ||
1715 | |||
1716 | psrstat = I915_READ(EDP_PSR_STATUS_CTL(dev)); | ||
1717 | |||
1718 | seq_puts(m, "PSR Current State: "); | ||
1719 | switch (psrstat & EDP_PSR_STATUS_STATE_MASK) { | ||
1720 | case EDP_PSR_STATUS_STATE_IDLE: | ||
1721 | seq_puts(m, "Reset state\n"); | ||
1722 | break; | ||
1723 | case EDP_PSR_STATUS_STATE_SRDONACK: | ||
1724 | seq_puts(m, "Wait for TG/Stream to send on frame of data after SRD conditions are met\n"); | ||
1725 | break; | ||
1726 | case EDP_PSR_STATUS_STATE_SRDENT: | ||
1727 | seq_puts(m, "SRD entry\n"); | ||
1728 | break; | ||
1729 | case EDP_PSR_STATUS_STATE_BUFOFF: | ||
1730 | seq_puts(m, "Wait for buffer turn off\n"); | ||
1731 | break; | ||
1732 | case EDP_PSR_STATUS_STATE_BUFON: | ||
1733 | seq_puts(m, "Wait for buffer turn on\n"); | ||
1734 | break; | ||
1735 | case EDP_PSR_STATUS_STATE_AUXACK: | ||
1736 | seq_puts(m, "Wait for AUX to acknowledge on SRD exit\n"); | ||
1737 | break; | ||
1738 | case EDP_PSR_STATUS_STATE_SRDOFFACK: | ||
1739 | seq_puts(m, "Wait for TG/Stream to acknowledge the SRD VDM exit\n"); | ||
1740 | break; | ||
1741 | default: | ||
1742 | seq_puts(m, "Unknown\n"); | ||
1743 | break; | ||
1744 | } | ||
1745 | |||
1746 | seq_puts(m, "Link Status: "); | ||
1747 | switch (psrstat & EDP_PSR_STATUS_LINK_MASK) { | ||
1748 | case EDP_PSR_STATUS_LINK_FULL_OFF: | ||
1749 | seq_puts(m, "Link is fully off\n"); | ||
1750 | break; | ||
1751 | case EDP_PSR_STATUS_LINK_FULL_ON: | ||
1752 | seq_puts(m, "Link is fully on\n"); | ||
1753 | break; | ||
1754 | case EDP_PSR_STATUS_LINK_STANDBY: | ||
1755 | seq_puts(m, "Link is in standby\n"); | ||
1756 | break; | ||
1757 | default: | ||
1758 | seq_puts(m, "Unknown\n"); | ||
1759 | break; | ||
1760 | } | ||
1761 | |||
1762 | seq_printf(m, "PSR Entry Count: %u\n", | ||
1763 | psrstat >> EDP_PSR_STATUS_COUNT_SHIFT & | ||
1764 | EDP_PSR_STATUS_COUNT_MASK); | ||
1765 | |||
1766 | seq_printf(m, "Max Sleep Timer Counter: %u\n", | ||
1767 | psrstat >> EDP_PSR_STATUS_MAX_SLEEP_TIMER_SHIFT & | ||
1768 | EDP_PSR_STATUS_MAX_SLEEP_TIMER_MASK); | ||
1769 | |||
1770 | seq_printf(m, "Had AUX error: %s\n", | ||
1771 | yesno(psrstat & EDP_PSR_STATUS_AUX_ERROR)); | ||
1772 | |||
1773 | seq_printf(m, "Sending AUX: %s\n", | ||
1774 | yesno(psrstat & EDP_PSR_STATUS_AUX_SENDING)); | ||
1775 | |||
1776 | seq_printf(m, "Sending Idle: %s\n", | ||
1777 | yesno(psrstat & EDP_PSR_STATUS_SENDING_IDLE)); | ||
1778 | |||
1779 | seq_printf(m, "Sending TP2 TP3: %s\n", | ||
1780 | yesno(psrstat & EDP_PSR_STATUS_SENDING_TP2_TP3)); | ||
1781 | |||
1782 | seq_printf(m, "Sending TP1: %s\n", | ||
1783 | yesno(psrstat & EDP_PSR_STATUS_SENDING_TP1)); | ||
1784 | 1674 | ||
1785 | seq_printf(m, "Idle Count: %u\n", | 1675 | enabled = HAS_PSR(dev) && |
1786 | psrstat & EDP_PSR_STATUS_IDLE_MASK); | 1676 | I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE; |
1677 | seq_printf(m, "Enabled: %s\n", yesno(enabled)); | ||
1787 | 1678 | ||
1788 | psrperf = (I915_READ(EDP_PSR_PERF_CNT(dev))) & EDP_PSR_PERF_CNT_MASK; | 1679 | if (HAS_PSR(dev)) |
1789 | seq_printf(m, "Performance Counter: %u\n", psrperf); | 1680 | psrperf = I915_READ(EDP_PSR_PERF_CNT(dev)) & |
1681 | EDP_PSR_PERF_CNT_MASK; | ||
1682 | seq_printf(m, "Performance_Counter: %u\n", psrperf); | ||
1790 | 1683 | ||
1791 | return 0; | 1684 | return 0; |
1792 | } | 1685 | } |