diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-10-04 07:53:36 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2013-10-09 01:55:31 -0400 |
commit | 5380e9293b865d88de04de6e5324726d8c5b53c9 (patch) | |
tree | 5d28c8a6a1cf43a3b2a76f16bd9c59a7fd424c39 /drivers/gpu/drm/gma500 | |
parent | bf507d90cf0eecf5495f66f21dbb66e35e9131ae (diff) |
drm: Collect per-crtc vblank stuff to a struct
drm_vblank_init() is too ugly. Make it a bit easier on the eye by
collecting all the per-crtc vblank counters, timestamps etc. to
a structure and just allocate an array of those.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500')
-rw-r--r-- | drivers/gpu/drm/gma500/psb_irq.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c index 029eccf30137..ba4830342d34 100644 --- a/drivers/gpu/drm/gma500/psb_irq.c +++ b/drivers/gpu/drm/gma500/psb_irq.c | |||
@@ -271,15 +271,15 @@ void psb_irq_preinstall(struct drm_device *dev) | |||
271 | 271 | ||
272 | if (gma_power_is_on(dev)) | 272 | if (gma_power_is_on(dev)) |
273 | PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); | 273 | PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); |
274 | if (dev->vblank_enabled[0]) | 274 | if (dev->vblank[0].enabled) |
275 | dev_priv->vdc_irq_mask |= _PSB_VSYNC_PIPEA_FLAG; | 275 | dev_priv->vdc_irq_mask |= _PSB_VSYNC_PIPEA_FLAG; |
276 | if (dev->vblank_enabled[1]) | 276 | if (dev->vblank[1].enabled) |
277 | dev_priv->vdc_irq_mask |= _PSB_VSYNC_PIPEB_FLAG; | 277 | dev_priv->vdc_irq_mask |= _PSB_VSYNC_PIPEB_FLAG; |
278 | 278 | ||
279 | /* FIXME: Handle Medfield irq mask | 279 | /* FIXME: Handle Medfield irq mask |
280 | if (dev->vblank_enabled[1]) | 280 | if (dev->vblank[1].enabled) |
281 | dev_priv->vdc_irq_mask |= _MDFLD_PIPEB_EVENT_FLAG; | 281 | dev_priv->vdc_irq_mask |= _MDFLD_PIPEB_EVENT_FLAG; |
282 | if (dev->vblank_enabled[2]) | 282 | if (dev->vblank[2].enabled) |
283 | dev_priv->vdc_irq_mask |= _MDFLD_PIPEC_EVENT_FLAG; | 283 | dev_priv->vdc_irq_mask |= _MDFLD_PIPEC_EVENT_FLAG; |
284 | */ | 284 | */ |
285 | 285 | ||
@@ -305,17 +305,17 @@ int psb_irq_postinstall(struct drm_device *dev) | |||
305 | PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); | 305 | PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); |
306 | PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); | 306 | PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); |
307 | 307 | ||
308 | if (dev->vblank_enabled[0]) | 308 | if (dev->vblank[0].enabled) |
309 | psb_enable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); | 309 | psb_enable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); |
310 | else | 310 | else |
311 | psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); | 311 | psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); |
312 | 312 | ||
313 | if (dev->vblank_enabled[1]) | 313 | if (dev->vblank[1].enabled) |
314 | psb_enable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); | 314 | psb_enable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); |
315 | else | 315 | else |
316 | psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); | 316 | psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); |
317 | 317 | ||
318 | if (dev->vblank_enabled[2]) | 318 | if (dev->vblank[2].enabled) |
319 | psb_enable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); | 319 | psb_enable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); |
320 | else | 320 | else |
321 | psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); | 321 | psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); |
@@ -339,13 +339,13 @@ void psb_irq_uninstall(struct drm_device *dev) | |||
339 | 339 | ||
340 | PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); | 340 | PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); |
341 | 341 | ||
342 | if (dev->vblank_enabled[0]) | 342 | if (dev->vblank[0].enabled) |
343 | psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); | 343 | psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); |
344 | 344 | ||
345 | if (dev->vblank_enabled[1]) | 345 | if (dev->vblank[1].enabled) |
346 | psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); | 346 | psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); |
347 | 347 | ||
348 | if (dev->vblank_enabled[2]) | 348 | if (dev->vblank[2].enabled) |
349 | psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); | 349 | psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); |
350 | 350 | ||
351 | dev_priv->vdc_irq_mask &= _PSB_IRQ_SGX_FLAG | | 351 | dev_priv->vdc_irq_mask &= _PSB_IRQ_SGX_FLAG | |
@@ -456,7 +456,7 @@ static int psb_vblank_do_wait(struct drm_device *dev, | |||
456 | { | 456 | { |
457 | unsigned int cur_vblank; | 457 | unsigned int cur_vblank; |
458 | int ret = 0; | 458 | int ret = 0; |
459 | DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, | 459 | DRM_WAIT_ON(ret, dev->vblank.queue, 3 * DRM_HZ, |
460 | (((cur_vblank = atomic_read(counter)) | 460 | (((cur_vblank = atomic_read(counter)) |
461 | - *sequence) <= (1 << 23))); | 461 | - *sequence) <= (1 << 23))); |
462 | *sequence = cur_vblank; | 462 | *sequence = cur_vblank; |