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authorInki Dae <inki.dae@samsung.com>2013-07-24 02:44:30 -0400
committerInki Dae <inki.dae@samsung.com>2013-09-05 00:43:42 -0400
commitb10d6350a5dfce9c4640e0974936452afd171a13 (patch)
tree9320a0572d6ffd873168fa2c12b7362e5a63c8ea /drivers/gpu/drm/exynos
parenta1bfacf4006a3bb410b0fa85e203f9249d2d35e9 (diff)
drm/exynos: add runtime pm interfaces to g2d driver
This patch makes g2d power domain and clock to be controlled through pm runtime interfaces instead of controlling them respectively. Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos')
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_g2d.c40
1 files changed, 28 insertions, 12 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index eddea4941483..b31356e67e5e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -808,17 +808,8 @@ static void g2d_dma_start(struct g2d_data *g2d,
808 int ret; 808 int ret;
809 809
810 ret = pm_runtime_get_sync(g2d->dev); 810 ret = pm_runtime_get_sync(g2d->dev);
811 if (ret < 0) { 811 if (ret < 0)
812 dev_warn(g2d->dev, "failed pm power on.\n");
813 return;
814 }
815
816 ret = clk_prepare_enable(g2d->gate_clk);
817 if (ret < 0) {
818 dev_warn(g2d->dev, "failed to enable clock.\n");
819 pm_runtime_put_sync(g2d->dev);
820 return; 812 return;
821 }
822 813
823 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR); 814 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
824 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND); 815 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
@@ -871,7 +862,6 @@ static void g2d_runqueue_worker(struct work_struct *work)
871 runqueue_work); 862 runqueue_work);
872 863
873 mutex_lock(&g2d->runqueue_mutex); 864 mutex_lock(&g2d->runqueue_mutex);
874 clk_disable_unprepare(g2d->gate_clk);
875 pm_runtime_put_sync(g2d->dev); 865 pm_runtime_put_sync(g2d->dev);
876 866
877 complete(&g2d->runqueue_node->complete); 867 complete(&g2d->runqueue_node->complete);
@@ -1524,7 +1514,33 @@ static int g2d_resume(struct device *dev)
1524} 1514}
1525#endif 1515#endif
1526 1516
1527static SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume); 1517#ifdef CONFIG_PM_RUNTIME
1518static int g2d_runtime_suspend(struct device *dev)
1519{
1520 struct g2d_data *g2d = dev_get_drvdata(dev);
1521
1522 clk_disable_unprepare(g2d->gate_clk);
1523
1524 return 0;
1525}
1526
1527static int g2d_runtime_resume(struct device *dev)
1528{
1529 struct g2d_data *g2d = dev_get_drvdata(dev);
1530 int ret;
1531
1532 ret = clk_prepare_enable(g2d->gate_clk);
1533 if (ret < 0)
1534 dev_warn(dev, "failed to enable clock.\n");
1535
1536 return ret;
1537}
1538#endif
1539
1540static const struct dev_pm_ops g2d_pm_ops = {
1541 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1542 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1543};
1528 1544
1529#ifdef CONFIG_OF 1545#ifdef CONFIG_OF
1530static const struct of_device_id exynos_g2d_match[] = { 1546static const struct of_device_id exynos_g2d_match[] = {