diff options
author | Andrzej Hajda <a.hajda@samsung.com> | 2014-03-17 06:27:19 -0400 |
---|---|---|
committer | Inki Dae <daeinki@gmail.com> | 2014-03-23 11:36:39 -0400 |
commit | 8b4cad23531da4e6a41838a9895e054d755c3255 (patch) | |
tree | b043a0e049451634de98ffb8617d163b6111e42e /drivers/gpu/drm/exynos/exynos_drm_fimd.c | |
parent | 8e527f0187182708b36d8d5c3a623778bb0bcf94 (diff) |
drm/exynos: correct timing porch conversion
The patch corrects porch calculation. It should
be calculated as a difference between adjacent
respective fields of drm_display_mode.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_drm_fimd.c')
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimd.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index f78fbf4682b4..10431b0a35ba 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c | |||
@@ -221,7 +221,7 @@ static void fimd_commit(struct exynos_drm_manager *mgr) | |||
221 | struct drm_display_mode *mode = &ctx->mode; | 221 | struct drm_display_mode *mode = &ctx->mode; |
222 | struct fimd_driver_data *driver_data; | 222 | struct fimd_driver_data *driver_data; |
223 | u32 val, clkdiv, vidcon1; | 223 | u32 val, clkdiv, vidcon1; |
224 | int hblank, vblank, vsync_len, vbpd, vfpd, hsync_len, hbpd, hfpd; | 224 | int vsync_len, vbpd, vfpd, hsync_len, hbpd, hfpd; |
225 | 225 | ||
226 | driver_data = ctx->driver_data; | 226 | driver_data = ctx->driver_data; |
227 | if (ctx->suspended) | 227 | if (ctx->suspended) |
@@ -240,10 +240,9 @@ static void fimd_commit(struct exynos_drm_manager *mgr) | |||
240 | writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1); | 240 | writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1); |
241 | 241 | ||
242 | /* setup vertical timing values. */ | 242 | /* setup vertical timing values. */ |
243 | vblank = mode->crtc_vblank_end - mode->crtc_vblank_start; | ||
244 | vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; | 243 | vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; |
245 | vbpd = (vblank - vsync_len) / 2; | 244 | vbpd = mode->crtc_vtotal - mode->crtc_vsync_end; |
246 | vfpd = vblank - vsync_len - vbpd; | 245 | vfpd = mode->crtc_vsync_start - mode->crtc_vdisplay; |
247 | 246 | ||
248 | val = VIDTCON0_VBPD(vbpd - 1) | | 247 | val = VIDTCON0_VBPD(vbpd - 1) | |
249 | VIDTCON0_VFPD(vfpd - 1) | | 248 | VIDTCON0_VFPD(vfpd - 1) | |
@@ -251,10 +250,9 @@ static void fimd_commit(struct exynos_drm_manager *mgr) | |||
251 | writel(val, ctx->regs + driver_data->timing_base + VIDTCON0); | 250 | writel(val, ctx->regs + driver_data->timing_base + VIDTCON0); |
252 | 251 | ||
253 | /* setup horizontal timing values. */ | 252 | /* setup horizontal timing values. */ |
254 | hblank = mode->crtc_hblank_end - mode->crtc_hblank_start; | ||
255 | hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; | 253 | hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; |
256 | hbpd = (hblank - hsync_len) / 2; | 254 | hbpd = mode->crtc_htotal - mode->crtc_hsync_end; |
257 | hfpd = hblank - hsync_len - hbpd; | 255 | hfpd = mode->crtc_hsync_start - mode->crtc_hdisplay; |
258 | 256 | ||
259 | val = VIDTCON1_HBPD(hbpd - 1) | | 257 | val = VIDTCON1_HBPD(hbpd - 1) | |
260 | VIDTCON1_HFPD(hfpd - 1) | | 258 | VIDTCON1_HFPD(hfpd - 1) | |