diff options
author | YoungJun Cho <yj44.cho@samsung.com> | 2013-06-11 21:44:40 -0400 |
---|---|---|
committer | Inki Dae <daeinki@gmail.com> | 2013-06-28 08:13:56 -0400 |
commit | cbc4c33d14ceefe99372065cb5733101401c08a2 (patch) | |
tree | eda6bfefdd81615e05b5beee48bcf28d0c5f8b3f /drivers/gpu/drm/exynos/exynos_drm_fimc.c | |
parent | bca34c9a40e503e9bc6bafa45819dd55c2fd3e20 (diff) |
drm/exynos: Clean up logs for DRM_ERROR / DRM_DEBUG_KMS
This patch cleans up logs for DRM_ERROR / DRM_DEBUG_KMS to avoid
logging duplicated function name because the macros already contain
__func__.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_drm_fimc.c')
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimc.c | 113 |
1 files changed, 53 insertions, 60 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c index 7b5f2e8f0861..61b094f689a7 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c | |||
@@ -217,7 +217,7 @@ static void fimc_set_type_ctrl(struct fimc_context *ctx, enum fimc_wb wb) | |||
217 | { | 217 | { |
218 | u32 cfg; | 218 | u32 cfg; |
219 | 219 | ||
220 | DRM_DEBUG_KMS("%s:wb[%d]\n", __func__, wb); | 220 | DRM_DEBUG_KMS("wb[%d]\n", wb); |
221 | 221 | ||
222 | cfg = fimc_read(EXYNOS_CIGCTRL); | 222 | cfg = fimc_read(EXYNOS_CIGCTRL); |
223 | cfg &= ~(EXYNOS_CIGCTRL_TESTPATTERN_MASK | | 223 | cfg &= ~(EXYNOS_CIGCTRL_TESTPATTERN_MASK | |
@@ -253,10 +253,10 @@ static void fimc_set_polarity(struct fimc_context *ctx, | |||
253 | { | 253 | { |
254 | u32 cfg; | 254 | u32 cfg; |
255 | 255 | ||
256 | DRM_DEBUG_KMS("%s:inv_pclk[%d]inv_vsync[%d]\n", | 256 | DRM_DEBUG_KMS("inv_pclk[%d]inv_vsync[%d]\n", |
257 | __func__, pol->inv_pclk, pol->inv_vsync); | 257 | pol->inv_pclk, pol->inv_vsync); |
258 | DRM_DEBUG_KMS("%s:inv_href[%d]inv_hsync[%d]\n", | 258 | DRM_DEBUG_KMS("inv_href[%d]inv_hsync[%d]\n", |
259 | __func__, pol->inv_href, pol->inv_hsync); | 259 | pol->inv_href, pol->inv_hsync); |
260 | 260 | ||
261 | cfg = fimc_read(EXYNOS_CIGCTRL); | 261 | cfg = fimc_read(EXYNOS_CIGCTRL); |
262 | cfg &= ~(EXYNOS_CIGCTRL_INVPOLPCLK | EXYNOS_CIGCTRL_INVPOLVSYNC | | 262 | cfg &= ~(EXYNOS_CIGCTRL_INVPOLPCLK | EXYNOS_CIGCTRL_INVPOLVSYNC | |
@@ -278,7 +278,7 @@ static void fimc_handle_jpeg(struct fimc_context *ctx, bool enable) | |||
278 | { | 278 | { |
279 | u32 cfg; | 279 | u32 cfg; |
280 | 280 | ||
281 | DRM_DEBUG_KMS("%s:enable[%d]\n", __func__, enable); | 281 | DRM_DEBUG_KMS("enable[%d]\n", enable); |
282 | 282 | ||
283 | cfg = fimc_read(EXYNOS_CIGCTRL); | 283 | cfg = fimc_read(EXYNOS_CIGCTRL); |
284 | if (enable) | 284 | if (enable) |
@@ -294,7 +294,7 @@ static void fimc_handle_irq(struct fimc_context *ctx, bool enable, | |||
294 | { | 294 | { |
295 | u32 cfg; | 295 | u32 cfg; |
296 | 296 | ||
297 | DRM_DEBUG_KMS("%s:enable[%d]overflow[%d]level[%d]\n", __func__, | 297 | DRM_DEBUG_KMS("enable[%d]overflow[%d]level[%d]\n", |
298 | enable, overflow, level); | 298 | enable, overflow, level); |
299 | 299 | ||
300 | cfg = fimc_read(EXYNOS_CIGCTRL); | 300 | cfg = fimc_read(EXYNOS_CIGCTRL); |
@@ -329,7 +329,7 @@ static bool fimc_check_ovf(struct fimc_context *ctx) | |||
329 | flag = EXYNOS_CISTATUS_OVFIY | EXYNOS_CISTATUS_OVFICB | | 329 | flag = EXYNOS_CISTATUS_OVFIY | EXYNOS_CISTATUS_OVFICB | |
330 | EXYNOS_CISTATUS_OVFICR; | 330 | EXYNOS_CISTATUS_OVFICR; |
331 | 331 | ||
332 | DRM_DEBUG_KMS("%s:flag[0x%x]\n", __func__, flag); | 332 | DRM_DEBUG_KMS("flag[0x%x]\n", flag); |
333 | 333 | ||
334 | if (status & flag) { | 334 | if (status & flag) { |
335 | cfg = fimc_read(EXYNOS_CIWDOFST); | 335 | cfg = fimc_read(EXYNOS_CIWDOFST); |
@@ -358,7 +358,7 @@ static bool fimc_check_frame_end(struct fimc_context *ctx) | |||
358 | 358 | ||
359 | cfg = fimc_read(EXYNOS_CISTATUS); | 359 | cfg = fimc_read(EXYNOS_CISTATUS); |
360 | 360 | ||
361 | DRM_DEBUG_KMS("%s:cfg[0x%x]\n", __func__, cfg); | 361 | DRM_DEBUG_KMS("cfg[0x%x]\n", cfg); |
362 | 362 | ||
363 | if (!(cfg & EXYNOS_CISTATUS_FRAMEEND)) | 363 | if (!(cfg & EXYNOS_CISTATUS_FRAMEEND)) |
364 | return false; | 364 | return false; |
@@ -380,7 +380,7 @@ static int fimc_get_buf_id(struct fimc_context *ctx) | |||
380 | if (frame_cnt == 0) | 380 | if (frame_cnt == 0) |
381 | frame_cnt = EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg); | 381 | frame_cnt = EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg); |
382 | 382 | ||
383 | DRM_DEBUG_KMS("%s:present[%d]before[%d]\n", __func__, | 383 | DRM_DEBUG_KMS("present[%d]before[%d]\n", |
384 | EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg), | 384 | EXYNOS_CISTATUS2_GET_FRAMECOUNT_PRESENT(cfg), |
385 | EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE(cfg)); | 385 | EXYNOS_CISTATUS2_GET_FRAMECOUNT_BEFORE(cfg)); |
386 | 386 | ||
@@ -390,7 +390,7 @@ static int fimc_get_buf_id(struct fimc_context *ctx) | |||
390 | } | 390 | } |
391 | 391 | ||
392 | buf_id = frame_cnt - 1; | 392 | buf_id = frame_cnt - 1; |
393 | DRM_DEBUG_KMS("%s:buf_id[%d]\n", __func__, buf_id); | 393 | DRM_DEBUG_KMS("buf_id[%d]\n", buf_id); |
394 | 394 | ||
395 | return buf_id; | 395 | return buf_id; |
396 | } | 396 | } |
@@ -399,7 +399,7 @@ static void fimc_handle_lastend(struct fimc_context *ctx, bool enable) | |||
399 | { | 399 | { |
400 | u32 cfg; | 400 | u32 cfg; |
401 | 401 | ||
402 | DRM_DEBUG_KMS("%s:enable[%d]\n", __func__, enable); | 402 | DRM_DEBUG_KMS("enable[%d]\n", enable); |
403 | 403 | ||
404 | cfg = fimc_read(EXYNOS_CIOCTRL); | 404 | cfg = fimc_read(EXYNOS_CIOCTRL); |
405 | if (enable) | 405 | if (enable) |
@@ -416,7 +416,7 @@ static int fimc_src_set_fmt_order(struct fimc_context *ctx, u32 fmt) | |||
416 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; | 416 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; |
417 | u32 cfg; | 417 | u32 cfg; |
418 | 418 | ||
419 | DRM_DEBUG_KMS("%s:fmt[0x%x]\n", __func__, fmt); | 419 | DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
420 | 420 | ||
421 | /* RGB */ | 421 | /* RGB */ |
422 | cfg = fimc_read(EXYNOS_CISCCTRL); | 422 | cfg = fimc_read(EXYNOS_CISCCTRL); |
@@ -489,7 +489,7 @@ static int fimc_src_set_fmt(struct device *dev, u32 fmt) | |||
489 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; | 489 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; |
490 | u32 cfg; | 490 | u32 cfg; |
491 | 491 | ||
492 | DRM_DEBUG_KMS("%s:fmt[0x%x]\n", __func__, fmt); | 492 | DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
493 | 493 | ||
494 | cfg = fimc_read(EXYNOS_MSCTRL); | 494 | cfg = fimc_read(EXYNOS_MSCTRL); |
495 | cfg &= ~EXYNOS_MSCTRL_INFORMAT_RGB; | 495 | cfg &= ~EXYNOS_MSCTRL_INFORMAT_RGB; |
@@ -549,8 +549,7 @@ static int fimc_src_set_transf(struct device *dev, | |||
549 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; | 549 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; |
550 | u32 cfg1, cfg2; | 550 | u32 cfg1, cfg2; |
551 | 551 | ||
552 | DRM_DEBUG_KMS("%s:degree[%d]flip[0x%x]\n", __func__, | 552 | DRM_DEBUG_KMS("degree[%d]flip[0x%x]\n", degree, flip); |
553 | degree, flip); | ||
554 | 553 | ||
555 | cfg1 = fimc_read(EXYNOS_MSCTRL); | 554 | cfg1 = fimc_read(EXYNOS_MSCTRL); |
556 | cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | | 555 | cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | |
@@ -613,10 +612,9 @@ static int fimc_set_window(struct fimc_context *ctx, | |||
613 | v1 = pos->y; | 612 | v1 = pos->y; |
614 | v2 = sz->vsize - pos->h - pos->y; | 613 | v2 = sz->vsize - pos->h - pos->y; |
615 | 614 | ||
616 | DRM_DEBUG_KMS("%s:x[%d]y[%d]w[%d]h[%d]hsize[%d]vsize[%d]\n", | 615 | DRM_DEBUG_KMS("x[%d]y[%d]w[%d]h[%d]hsize[%d]vsize[%d]\n", |
617 | __func__, pos->x, pos->y, pos->w, pos->h, sz->hsize, sz->vsize); | 616 | pos->x, pos->y, pos->w, pos->h, sz->hsize, sz->vsize); |
618 | DRM_DEBUG_KMS("%s:h1[%d]h2[%d]v1[%d]v2[%d]\n", __func__, | 617 | DRM_DEBUG_KMS("h1[%d]h2[%d]v1[%d]v2[%d]\n", h1, h2, v1, v2); |
619 | h1, h2, v1, v2); | ||
620 | 618 | ||
621 | /* | 619 | /* |
622 | * set window offset 1, 2 size | 620 | * set window offset 1, 2 size |
@@ -645,8 +643,8 @@ static int fimc_src_set_size(struct device *dev, int swap, | |||
645 | struct drm_exynos_sz img_sz = *sz; | 643 | struct drm_exynos_sz img_sz = *sz; |
646 | u32 cfg; | 644 | u32 cfg; |
647 | 645 | ||
648 | DRM_DEBUG_KMS("%s:swap[%d]hsize[%d]vsize[%d]\n", | 646 | DRM_DEBUG_KMS("swap[%d]hsize[%d]vsize[%d]\n", |
649 | __func__, swap, sz->hsize, sz->vsize); | 647 | swap, sz->hsize, sz->vsize); |
650 | 648 | ||
651 | /* original size */ | 649 | /* original size */ |
652 | cfg = (EXYNOS_ORGISIZE_HORIZONTAL(img_sz.hsize) | | 650 | cfg = (EXYNOS_ORGISIZE_HORIZONTAL(img_sz.hsize) | |
@@ -654,8 +652,7 @@ static int fimc_src_set_size(struct device *dev, int swap, | |||
654 | 652 | ||
655 | fimc_write(cfg, EXYNOS_ORGISIZE); | 653 | fimc_write(cfg, EXYNOS_ORGISIZE); |
656 | 654 | ||
657 | DRM_DEBUG_KMS("%s:x[%d]y[%d]w[%d]h[%d]\n", __func__, | 655 | DRM_DEBUG_KMS("x[%d]y[%d]w[%d]h[%d]\n", pos->x, pos->y, pos->w, pos->h); |
658 | pos->x, pos->y, pos->w, pos->h); | ||
659 | 656 | ||
660 | if (swap) { | 657 | if (swap) { |
661 | img_pos.w = pos->h; | 658 | img_pos.w = pos->h; |
@@ -712,7 +709,7 @@ static int fimc_src_set_addr(struct device *dev, | |||
712 | 709 | ||
713 | property = &c_node->property; | 710 | property = &c_node->property; |
714 | 711 | ||
715 | DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__, | 712 | DRM_DEBUG_KMS("prop_id[%d]buf_id[%d]buf_type[%d]\n", |
716 | property->prop_id, buf_id, buf_type); | 713 | property->prop_id, buf_id, buf_type); |
717 | 714 | ||
718 | if (buf_id > FIMC_MAX_SRC) { | 715 | if (buf_id > FIMC_MAX_SRC) { |
@@ -764,7 +761,7 @@ static int fimc_dst_set_fmt_order(struct fimc_context *ctx, u32 fmt) | |||
764 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; | 761 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; |
765 | u32 cfg; | 762 | u32 cfg; |
766 | 763 | ||
767 | DRM_DEBUG_KMS("%s:fmt[0x%x]\n", __func__, fmt); | 764 | DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
768 | 765 | ||
769 | /* RGB */ | 766 | /* RGB */ |
770 | cfg = fimc_read(EXYNOS_CISCCTRL); | 767 | cfg = fimc_read(EXYNOS_CISCCTRL); |
@@ -843,7 +840,7 @@ static int fimc_dst_set_fmt(struct device *dev, u32 fmt) | |||
843 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; | 840 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; |
844 | u32 cfg; | 841 | u32 cfg; |
845 | 842 | ||
846 | DRM_DEBUG_KMS("%s:fmt[0x%x]\n", __func__, fmt); | 843 | DRM_DEBUG_KMS("fmt[0x%x]\n", fmt); |
847 | 844 | ||
848 | cfg = fimc_read(EXYNOS_CIEXTEN); | 845 | cfg = fimc_read(EXYNOS_CIEXTEN); |
849 | 846 | ||
@@ -911,8 +908,7 @@ static int fimc_dst_set_transf(struct device *dev, | |||
911 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; | 908 | struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; |
912 | u32 cfg; | 909 | u32 cfg; |
913 | 910 | ||
914 | DRM_DEBUG_KMS("%s:degree[%d]flip[0x%x]\n", __func__, | 911 | DRM_DEBUG_KMS("degree[%d]flip[0x%x]\n", degree, flip); |
915 | degree, flip); | ||
916 | 912 | ||
917 | cfg = fimc_read(EXYNOS_CITRGFMT); | 913 | cfg = fimc_read(EXYNOS_CITRGFMT); |
918 | cfg &= ~EXYNOS_CITRGFMT_FLIP_MASK; | 914 | cfg &= ~EXYNOS_CITRGFMT_FLIP_MASK; |
@@ -962,7 +958,7 @@ static int fimc_dst_set_transf(struct device *dev, | |||
962 | 958 | ||
963 | static int fimc_get_ratio_shift(u32 src, u32 dst, u32 *ratio, u32 *shift) | 959 | static int fimc_get_ratio_shift(u32 src, u32 dst, u32 *ratio, u32 *shift) |
964 | { | 960 | { |
965 | DRM_DEBUG_KMS("%s:src[%d]dst[%d]\n", __func__, src, dst); | 961 | DRM_DEBUG_KMS("src[%d]dst[%d]\n", src, dst); |
966 | 962 | ||
967 | if (src >= dst * 64) { | 963 | if (src >= dst * 64) { |
968 | DRM_ERROR("failed to make ratio and shift.\n"); | 964 | DRM_ERROR("failed to make ratio and shift.\n"); |
@@ -1031,20 +1027,20 @@ static int fimc_set_prescaler(struct fimc_context *ctx, struct fimc_scaler *sc, | |||
1031 | 1027 | ||
1032 | pre_dst_width = src_w / pre_hratio; | 1028 | pre_dst_width = src_w / pre_hratio; |
1033 | pre_dst_height = src_h / pre_vratio; | 1029 | pre_dst_height = src_h / pre_vratio; |
1034 | DRM_DEBUG_KMS("%s:pre_dst_width[%d]pre_dst_height[%d]\n", __func__, | 1030 | DRM_DEBUG_KMS("pre_dst_width[%d]pre_dst_height[%d]\n", |
1035 | pre_dst_width, pre_dst_height); | 1031 | pre_dst_width, pre_dst_height); |
1036 | DRM_DEBUG_KMS("%s:pre_hratio[%d]hfactor[%d]pre_vratio[%d]vfactor[%d]\n", | 1032 | DRM_DEBUG_KMS("pre_hratio[%d]hfactor[%d]pre_vratio[%d]vfactor[%d]\n", |
1037 | __func__, pre_hratio, hfactor, pre_vratio, vfactor); | 1033 | pre_hratio, hfactor, pre_vratio, vfactor); |
1038 | 1034 | ||
1039 | sc->hratio = (src_w << 14) / (dst_w << hfactor); | 1035 | sc->hratio = (src_w << 14) / (dst_w << hfactor); |
1040 | sc->vratio = (src_h << 14) / (dst_h << vfactor); | 1036 | sc->vratio = (src_h << 14) / (dst_h << vfactor); |
1041 | sc->up_h = (dst_w >= src_w) ? true : false; | 1037 | sc->up_h = (dst_w >= src_w) ? true : false; |
1042 | sc->up_v = (dst_h >= src_h) ? true : false; | 1038 | sc->up_v = (dst_h >= src_h) ? true : false; |
1043 | DRM_DEBUG_KMS("%s:hratio[%d]vratio[%d]up_h[%d]up_v[%d]\n", | 1039 | DRM_DEBUG_KMS("hratio[%d]vratio[%d]up_h[%d]up_v[%d]\n", |
1044 | __func__, sc->hratio, sc->vratio, sc->up_h, sc->up_v); | 1040 | sc->hratio, sc->vratio, sc->up_h, sc->up_v); |
1045 | 1041 | ||
1046 | shfactor = FIMC_SHFACTOR - (hfactor + vfactor); | 1042 | shfactor = FIMC_SHFACTOR - (hfactor + vfactor); |
1047 | DRM_DEBUG_KMS("%s:shfactor[%d]\n", __func__, shfactor); | 1043 | DRM_DEBUG_KMS("shfactor[%d]\n", shfactor); |
1048 | 1044 | ||
1049 | cfg = (EXYNOS_CISCPRERATIO_SHFACTOR(shfactor) | | 1045 | cfg = (EXYNOS_CISCPRERATIO_SHFACTOR(shfactor) | |
1050 | EXYNOS_CISCPRERATIO_PREHORRATIO(pre_hratio) | | 1046 | EXYNOS_CISCPRERATIO_PREHORRATIO(pre_hratio) | |
@@ -1062,10 +1058,10 @@ static void fimc_set_scaler(struct fimc_context *ctx, struct fimc_scaler *sc) | |||
1062 | { | 1058 | { |
1063 | u32 cfg, cfg_ext; | 1059 | u32 cfg, cfg_ext; |
1064 | 1060 | ||
1065 | DRM_DEBUG_KMS("%s:range[%d]bypass[%d]up_h[%d]up_v[%d]\n", | 1061 | DRM_DEBUG_KMS("range[%d]bypass[%d]up_h[%d]up_v[%d]\n", |
1066 | __func__, sc->range, sc->bypass, sc->up_h, sc->up_v); | 1062 | sc->range, sc->bypass, sc->up_h, sc->up_v); |
1067 | DRM_DEBUG_KMS("%s:hratio[%d]vratio[%d]\n", | 1063 | DRM_DEBUG_KMS("hratio[%d]vratio[%d]\n", |
1068 | __func__, sc->hratio, sc->vratio); | 1064 | sc->hratio, sc->vratio); |
1069 | 1065 | ||
1070 | cfg = fimc_read(EXYNOS_CISCCTRL); | 1066 | cfg = fimc_read(EXYNOS_CISCCTRL); |
1071 | cfg &= ~(EXYNOS_CISCCTRL_SCALERBYPASS | | 1067 | cfg &= ~(EXYNOS_CISCCTRL_SCALERBYPASS | |
@@ -1105,8 +1101,8 @@ static int fimc_dst_set_size(struct device *dev, int swap, | |||
1105 | struct drm_exynos_sz img_sz = *sz; | 1101 | struct drm_exynos_sz img_sz = *sz; |
1106 | u32 cfg; | 1102 | u32 cfg; |
1107 | 1103 | ||
1108 | DRM_DEBUG_KMS("%s:swap[%d]hsize[%d]vsize[%d]\n", | 1104 | DRM_DEBUG_KMS("swap[%d]hsize[%d]vsize[%d]\n", |
1109 | __func__, swap, sz->hsize, sz->vsize); | 1105 | swap, sz->hsize, sz->vsize); |
1110 | 1106 | ||
1111 | /* original size */ | 1107 | /* original size */ |
1112 | cfg = (EXYNOS_ORGOSIZE_HORIZONTAL(img_sz.hsize) | | 1108 | cfg = (EXYNOS_ORGOSIZE_HORIZONTAL(img_sz.hsize) | |
@@ -1114,8 +1110,7 @@ static int fimc_dst_set_size(struct device *dev, int swap, | |||
1114 | 1110 | ||
1115 | fimc_write(cfg, EXYNOS_ORGOSIZE); | 1111 | fimc_write(cfg, EXYNOS_ORGOSIZE); |
1116 | 1112 | ||
1117 | DRM_DEBUG_KMS("%s:x[%d]y[%d]w[%d]h[%d]\n", | 1113 | DRM_DEBUG_KMS("x[%d]y[%d]w[%d]h[%d]\n", pos->x, pos->y, pos->w, pos->h); |
1118 | __func__, pos->x, pos->y, pos->w, pos->h); | ||
1119 | 1114 | ||
1120 | /* CSC ITU */ | 1115 | /* CSC ITU */ |
1121 | cfg = fimc_read(EXYNOS_CIGCTRL); | 1116 | cfg = fimc_read(EXYNOS_CIGCTRL); |
@@ -1172,7 +1167,7 @@ static int fimc_dst_get_buf_seq(struct fimc_context *ctx) | |||
1172 | if (cfg & (mask << i)) | 1167 | if (cfg & (mask << i)) |
1173 | buf_num++; | 1168 | buf_num++; |
1174 | 1169 | ||
1175 | DRM_DEBUG_KMS("%s:buf_num[%d]\n", __func__, buf_num); | 1170 | DRM_DEBUG_KMS("buf_num[%d]\n", buf_num); |
1176 | 1171 | ||
1177 | return buf_num; | 1172 | return buf_num; |
1178 | } | 1173 | } |
@@ -1186,8 +1181,7 @@ static int fimc_dst_set_buf_seq(struct fimc_context *ctx, u32 buf_id, | |||
1186 | u32 mask = 0x00000001 << buf_id; | 1181 | u32 mask = 0x00000001 << buf_id; |
1187 | int ret = 0; | 1182 | int ret = 0; |
1188 | 1183 | ||
1189 | DRM_DEBUG_KMS("%s:buf_id[%d]buf_type[%d]\n", __func__, | 1184 | DRM_DEBUG_KMS("buf_id[%d]buf_type[%d]\n", buf_id, buf_type); |
1190 | buf_id, buf_type); | ||
1191 | 1185 | ||
1192 | mutex_lock(&ctx->lock); | 1186 | mutex_lock(&ctx->lock); |
1193 | 1187 | ||
@@ -1244,7 +1238,7 @@ static int fimc_dst_set_addr(struct device *dev, | |||
1244 | 1238 | ||
1245 | property = &c_node->property; | 1239 | property = &c_node->property; |
1246 | 1240 | ||
1247 | DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__, | 1241 | DRM_DEBUG_KMS("prop_id[%d]buf_id[%d]buf_type[%d]\n", |
1248 | property->prop_id, buf_id, buf_type); | 1242 | property->prop_id, buf_id, buf_type); |
1249 | 1243 | ||
1250 | if (buf_id > FIMC_MAX_DST) { | 1244 | if (buf_id > FIMC_MAX_DST) { |
@@ -1294,7 +1288,7 @@ static struct exynos_drm_ipp_ops fimc_dst_ops = { | |||
1294 | 1288 | ||
1295 | static int fimc_clk_ctrl(struct fimc_context *ctx, bool enable) | 1289 | static int fimc_clk_ctrl(struct fimc_context *ctx, bool enable) |
1296 | { | 1290 | { |
1297 | DRM_DEBUG_KMS("%s:enable[%d]\n", __func__, enable); | 1291 | DRM_DEBUG_KMS("enable[%d]\n", enable); |
1298 | 1292 | ||
1299 | if (enable) { | 1293 | if (enable) { |
1300 | clk_prepare_enable(ctx->clocks[FIMC_CLK_GATE]); | 1294 | clk_prepare_enable(ctx->clocks[FIMC_CLK_GATE]); |
@@ -1318,7 +1312,7 @@ static irqreturn_t fimc_irq_handler(int irq, void *dev_id) | |||
1318 | c_node->event_work; | 1312 | c_node->event_work; |
1319 | int buf_id; | 1313 | int buf_id; |
1320 | 1314 | ||
1321 | DRM_DEBUG_KMS("%s:fimc id[%d]\n", __func__, ctx->id); | 1315 | DRM_DEBUG_KMS("fimc id[%d]\n", ctx->id); |
1322 | 1316 | ||
1323 | fimc_clear_irq(ctx); | 1317 | fimc_clear_irq(ctx); |
1324 | if (fimc_check_ovf(ctx)) | 1318 | if (fimc_check_ovf(ctx)) |
@@ -1331,7 +1325,7 @@ static irqreturn_t fimc_irq_handler(int irq, void *dev_id) | |||
1331 | if (buf_id < 0) | 1325 | if (buf_id < 0) |
1332 | return IRQ_HANDLED; | 1326 | return IRQ_HANDLED; |
1333 | 1327 | ||
1334 | DRM_DEBUG_KMS("%s:buf_id[%d]\n", __func__, buf_id); | 1328 | DRM_DEBUG_KMS("buf_id[%d]\n", buf_id); |
1335 | 1329 | ||
1336 | if (fimc_dst_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE) < 0) { | 1330 | if (fimc_dst_set_buf_seq(ctx, buf_id, IPP_BUF_DEQUEUE) < 0) { |
1337 | DRM_ERROR("failed to dequeue.\n"); | 1331 | DRM_ERROR("failed to dequeue.\n"); |
@@ -1392,7 +1386,7 @@ static inline bool fimc_check_drm_flip(enum drm_exynos_flip flip) | |||
1392 | case EXYNOS_DRM_FLIP_BOTH: | 1386 | case EXYNOS_DRM_FLIP_BOTH: |
1393 | return true; | 1387 | return true; |
1394 | default: | 1388 | default: |
1395 | DRM_DEBUG_KMS("%s:invalid flip\n", __func__); | 1389 | DRM_DEBUG_KMS("invalid flip\n"); |
1396 | return false; | 1390 | return false; |
1397 | } | 1391 | } |
1398 | } | 1392 | } |
@@ -1554,7 +1548,7 @@ static int fimc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd) | |||
1554 | int ret, i; | 1548 | int ret, i; |
1555 | u32 cfg0, cfg1; | 1549 | u32 cfg0, cfg1; |
1556 | 1550 | ||
1557 | DRM_DEBUG_KMS("%s:cmd[%d]\n", __func__, cmd); | 1551 | DRM_DEBUG_KMS("cmd[%d]\n", cmd); |
1558 | 1552 | ||
1559 | if (!c_node) { | 1553 | if (!c_node) { |
1560 | DRM_ERROR("failed to get c_node.\n"); | 1554 | DRM_ERROR("failed to get c_node.\n"); |
@@ -1663,7 +1657,7 @@ static void fimc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd) | |||
1663 | struct drm_exynos_ipp_set_wb set_wb = {0, 0}; | 1657 | struct drm_exynos_ipp_set_wb set_wb = {0, 0}; |
1664 | u32 cfg; | 1658 | u32 cfg; |
1665 | 1659 | ||
1666 | DRM_DEBUG_KMS("%s:cmd[%d]\n", __func__, cmd); | 1660 | DRM_DEBUG_KMS("cmd[%d]\n", cmd); |
1667 | 1661 | ||
1668 | switch (cmd) { | 1662 | switch (cmd) { |
1669 | case IPP_CMD_M2M: | 1663 | case IPP_CMD_M2M: |
@@ -1853,8 +1847,7 @@ static int fimc_probe(struct platform_device *pdev) | |||
1853 | goto err_put_clk; | 1847 | goto err_put_clk; |
1854 | } | 1848 | } |
1855 | 1849 | ||
1856 | DRM_DEBUG_KMS("%s:id[%d]ippdrv[0x%x]\n", __func__, ctx->id, | 1850 | DRM_DEBUG_KMS("id[%d]ippdrv[0x%x]\n", ctx->id, (int)ippdrv); |
1857 | (int)ippdrv); | ||
1858 | 1851 | ||
1859 | mutex_init(&ctx->lock); | 1852 | mutex_init(&ctx->lock); |
1860 | platform_set_drvdata(pdev, ctx); | 1853 | platform_set_drvdata(pdev, ctx); |
@@ -1901,7 +1894,7 @@ static int fimc_suspend(struct device *dev) | |||
1901 | { | 1894 | { |
1902 | struct fimc_context *ctx = get_fimc_context(dev); | 1895 | struct fimc_context *ctx = get_fimc_context(dev); |
1903 | 1896 | ||
1904 | DRM_DEBUG_KMS("%s:id[%d]\n", __func__, ctx->id); | 1897 | DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
1905 | 1898 | ||
1906 | if (pm_runtime_suspended(dev)) | 1899 | if (pm_runtime_suspended(dev)) |
1907 | return 0; | 1900 | return 0; |
@@ -1913,7 +1906,7 @@ static int fimc_resume(struct device *dev) | |||
1913 | { | 1906 | { |
1914 | struct fimc_context *ctx = get_fimc_context(dev); | 1907 | struct fimc_context *ctx = get_fimc_context(dev); |
1915 | 1908 | ||
1916 | DRM_DEBUG_KMS("%s:id[%d]\n", __func__, ctx->id); | 1909 | DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
1917 | 1910 | ||
1918 | if (!pm_runtime_suspended(dev)) | 1911 | if (!pm_runtime_suspended(dev)) |
1919 | return fimc_clk_ctrl(ctx, true); | 1912 | return fimc_clk_ctrl(ctx, true); |
@@ -1927,7 +1920,7 @@ static int fimc_runtime_suspend(struct device *dev) | |||
1927 | { | 1920 | { |
1928 | struct fimc_context *ctx = get_fimc_context(dev); | 1921 | struct fimc_context *ctx = get_fimc_context(dev); |
1929 | 1922 | ||
1930 | DRM_DEBUG_KMS("%s:id[%d]\n", __func__, ctx->id); | 1923 | DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
1931 | 1924 | ||
1932 | return fimc_clk_ctrl(ctx, false); | 1925 | return fimc_clk_ctrl(ctx, false); |
1933 | } | 1926 | } |
@@ -1936,7 +1929,7 @@ static int fimc_runtime_resume(struct device *dev) | |||
1936 | { | 1929 | { |
1937 | struct fimc_context *ctx = get_fimc_context(dev); | 1930 | struct fimc_context *ctx = get_fimc_context(dev); |
1938 | 1931 | ||
1939 | DRM_DEBUG_KMS("%s:id[%d]\n", __func__, ctx->id); | 1932 | DRM_DEBUG_KMS("id[%d]\n", ctx->id); |
1940 | 1933 | ||
1941 | return fimc_clk_ctrl(ctx, true); | 1934 | return fimc_clk_ctrl(ctx, true); |
1942 | } | 1935 | } |