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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2012-12-03 11:43:32 -0500 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-12-03 12:31:20 -0500 |
commit | 633cf8f5056c3e72158e4dbc387b3d65926d2d55 (patch) | |
tree | 6cc390a59636d26d70165322bbab2ebed155cd17 /drivers/gpu/drm/drm_crtc.c | |
parent | a2165e312381f35b8abd7dcb8a8ab955bc60d867 (diff) |
drm/i915: Don't allow ring tail to reach the same cacheline as head
From BSpec:
"If the Ring Buffer Head Pointer and the Tail Pointer are on the same
cacheline, the Head Pointer must not be greater than the Tail
Pointer."
The easiest way to enforce this is to reduce the reported ring space.
References:
Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use"
Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use"
Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring Buffer Use"
v2: Include the exact BSpec references in the description
v3: s/64/I915_RING_FREE_SPACE, and add the BSpec information to the code
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/drm_crtc.c')
0 files changed, 0 insertions, 0 deletions