Merge branch 'spi/merge' into spi/next

4 files changed, 74 insertions, 46 deletions

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 4a7f63143455..2967002a9f82 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -87,32 +87,20 @@ config GPIO_IT8761E
           Say yes here to support GPIO functionality of IT8761E super I/O chip.
 
 config GPIO_EXYNOS4
-        bool "Samsung Exynos4 GPIO library support"
-        default y if CPU_EXYNOS4210
-        depends on ARM
-        help
-          Say yes here to support Samsung Exynos4 series SoCs GPIO library
+        def_bool y
+        depends on CPU_EXYNOS4210
 
 config GPIO_PLAT_SAMSUNG
-        bool "Samsung SoCs GPIO library support"
-        default y if SAMSUNG_GPIOLIB_4BIT
-        depends on ARM
-        help
-          Say yes here to support Samsung SoCs GPIO library
+        def_bool y
+        depends on SAMSUNG_GPIOLIB_4BIT
 
 config GPIO_S5PC100
-        bool "Samsung S5PC100 GPIO library support"
-        default y if CPU_S5PC100
-        depends on ARM
-        help
-          Say yes here to support Samsung S5PC100 SoCs GPIO library
+        def_bool y
+        depends on CPU_S5PC100
 
 config GPIO_S5PV210
-        bool "Samsung S5PV210/S5PC110 GPIO library support"
-        default y if CPU_S5PV210
-        depends on ARM
-        help
-          Say yes here to support Samsung S5PV210/S5PC110 SoCs GPIO library
+        def_bool y
+        depends on CPU_S5PV210
 
 config GPIO_PL061
         bool "PrimeCell PL061 GPIO support"
diff --git a/drivers/gpio/gpio-exynos4.c b/drivers/gpio/gpio-exynos4.c
index d54ca6adb660..9029835112e7 100644
--- a/drivers/gpio/gpio-exynos4.c
+++ b/drivers/gpio/gpio-exynos4.c
@@ -21,16 +21,37 @@
 #include <plat/gpio-cfg.h>
 #include <plat/gpio-cfg-helpers.h>
 
+int s3c_gpio_setpull_exynos4(struct s3c_gpio_chip *chip,
+                                unsigned int off, s3c_gpio_pull_t pull)
+{
+        if (pull == S3C_GPIO_PULL_UP)
+                pull = 3;
+
+        return s3c_gpio_setpull_updown(chip, off, pull);
+}
+
+s3c_gpio_pull_t s3c_gpio_getpull_exynos4(struct s3c_gpio_chip *chip,
+                                                unsigned int off)
+{
+        s3c_gpio_pull_t pull;
+
+        pull = s3c_gpio_getpull_updown(chip, off);
+        if (pull == 3)
+                pull = S3C_GPIO_PULL_UP;
+
+        return pull;
+}
+
 static struct s3c_gpio_cfg gpio_cfg = {
         .set_config     = s3c_gpio_setcfg_s3c64xx_4bit,
-        .set_pull       = s3c_gpio_setpull_updown,
-        .get_pull       = s3c_gpio_getpull_updown,
+        .set_pull       = s3c_gpio_setpull_exynos4,
+        .get_pull       = s3c_gpio_getpull_exynos4,
 };
 
 static struct s3c_gpio_cfg gpio_cfg_noint = {
         .set_config     = s3c_gpio_setcfg_s3c64xx_4bit,
-        .set_pull       = s3c_gpio_setpull_updown,
-        .get_pull       = s3c_gpio_getpull_updown,
+        .set_pull       = s3c_gpio_setpull_exynos4,
+        .get_pull       = s3c_gpio_getpull_exynos4,
 };
 
 /*
diff --git a/drivers/gpio/gpio-nomadik.c b/drivers/gpio/gpio-nomadik.c
index 4961ef9bc153..2c212c732d76 100644
--- a/drivers/gpio/gpio-nomadik.c
+++ b/drivers/gpio/gpio-nomadik.c
@@ -4,6 +4,7 @@
  * Copyright (C) 2008,2009 STMicroelectronics
  * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
  *   Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
+ * Copyright (C) 2011 Linus Walleij <linus.walleij@linaro.org>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -49,6 +50,7 @@ struct nmk_gpio_chip {
         u32 (*get_secondary_status)(unsigned int bank);
         void (*set_ioforce)(bool enable);
         spinlock_t lock;
+        bool sleepmode;
         /* Keep track of configured edges */
         u32 edge_rising;
         u32 edge_falling;
@@ -393,14 +395,25 @@ EXPORT_SYMBOL(nmk_config_pins_sleep);
  * @gpio: pin number
  * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
  *
- * Sets the sleep mode of a pin.  If @mode is NMK_GPIO_SLPM_INPUT, the pin is
- * changed to an input (with pullup/down enabled) in sleep and deep sleep.  If
- * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
- * configured even when in sleep and deep sleep.
+ * This register is actually in the pinmux layer, not the GPIO block itself.
+ * The GPIO1B_SLPM register defines the GPIO mode when SLEEP/DEEP-SLEEP
+ * mode is entered (i.e. when signal IOFORCE is HIGH by the platform code).
+ * Each GPIO can be configured to be forced into GPIO mode when IOFORCE is
+ * HIGH, overriding the normal setting defined by GPIO_AFSELx registers.
+ * When IOFORCE returns LOW (by software, after SLEEP/DEEP-SLEEP exit),
+ * the GPIOs return to the normal setting defined by GPIO_AFSELx registers.
  *
- * On DB8500v2 onwards, this setting loses the previous meaning and instead
- * indicates if wakeup detection is enabled on the pin.  Note that
- * enable_irq_wake() will automatically enable wakeup detection.
+ * If @mode is NMK_GPIO_SLPM_INPUT, the corresponding GPIO is switched to GPIO
+ * mode when signal IOFORCE is HIGH (i.e. when SLEEP/DEEP-SLEEP mode is
+ * entered) regardless of the altfunction selected. Also wake-up detection is
+ * ENABLED.
+ *
+ * If @mode is NMK_GPIO_SLPM_NOCHANGE, the corresponding GPIO remains
+ * controlled by NMK_GPIO_DATC, NMK_GPIO_DATS, NMK_GPIO_DIR, NMK_GPIO_PDIS
+ * (for altfunction GPIO) or respective on-chip peripherals (for other
+ * altfuncs) when IOFORCE is HIGH. Also wake-up detection DISABLED.
+ *
+ * Note that enable_irq_wake() will automatically enable wakeup detection.
  */
 int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
 {
@@ -551,6 +564,12 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
 static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
                                 int gpio, bool on)
 {
+        if (nmk_chip->sleepmode) {
+                __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base,
+                                    on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
+                                    : NMK_GPIO_SLPM_WAKEUP_DISABLE);
+        }
+
         __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
 }
 
@@ -901,7 +920,7 @@ void nmk_gpio_wakeups_suspend(void)
                 writel(chip->fwimsc & chip->real_wake,
                        chip->addr + NMK_GPIO_FWIMSC);
 
-                if (cpu_is_u8500v2()) {
+                if (chip->sleepmode) {
                         chip->slpm = readl(chip->addr + NMK_GPIO_SLPC);
 
                         /* 0 -> wakeup enable */
@@ -923,7 +942,7 @@ void nmk_gpio_wakeups_resume(void)
                 writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
                 writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);
 
-                if (cpu_is_u8500v2())
+                if (chip->sleepmode)
                         writel(chip->slpm, chip->addr + NMK_GPIO_SLPC);
         }
 }
@@ -1010,6 +1029,7 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
         nmk_chip->secondary_parent_irq = secondary_irq;
         nmk_chip->get_secondary_status = pdata->get_secondary_status;
         nmk_chip->set_ioforce = pdata->set_ioforce;
+        nmk_chip->sleepmode = pdata->supports_sleepmode;
         spin_lock_init(&nmk_chip->lock);
 
         chip = &nmk_chip->chip;
@@ -1065,5 +1085,3 @@ core_initcall(nmk_gpio_init);
 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
 MODULE_DESCRIPTION("Nomadik GPIO Driver");
 MODULE_LICENSE("GPL");
-
-
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 6c51191da567..01f74a8459d9 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -432,7 +432,6 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
 {
         void __iomem *base = bank->base;
         u32 gpio_bit = 1 << gpio;
-        u32 val;
 
         if (cpu_is_omap44xx()) {
                 MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
@@ -455,15 +454,8 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
         }
         if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
                 if (cpu_is_omap44xx()) {
-                        if (trigger != 0)
-                                __raw_writel(1 << gpio, bank->base+
-                                                OMAP4_GPIO_IRQWAKEN0);
-                        else {
-                                val = __raw_readl(bank->base +
-                                                        OMAP4_GPIO_IRQWAKEN0);
-                                __raw_writel(val & (~(1 << gpio)), bank->base +
-                                                         OMAP4_GPIO_IRQWAKEN0);
-                        }
+                        MOD_REG_BIT(OMAP4_GPIO_IRQWAKEN0, gpio_bit,
+                                trigger != 0);
                 } else {
                         /*
                          * GPIO wakeup request can only be generated on edge
@@ -1134,8 +1126,11 @@ static void gpio_irq_shutdown(struct irq_data *d)
 {
         unsigned int gpio = d->irq - IH_GPIO_BASE;
         struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
+        unsigned long flags;
 
+        spin_lock_irqsave(&bank->lock, flags);
         _reset_gpio(bank, gpio);
+        spin_unlock_irqrestore(&bank->lock, flags);
 }
 
 static void gpio_ack_irq(struct irq_data *d)
@@ -1150,9 +1145,12 @@ static void gpio_mask_irq(struct irq_data *d)
 {
         unsigned int gpio = d->irq - IH_GPIO_BASE;
         struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
+        unsigned long flags;
 
+        spin_lock_irqsave(&bank->lock, flags);
         _set_gpio_irqenable(bank, gpio, 0);
         _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
+        spin_unlock_irqrestore(&bank->lock, flags);
 }
 
 static void gpio_unmask_irq(struct irq_data *d)
@@ -1161,7 +1159,9 @@ static void gpio_unmask_irq(struct irq_data *d)
         struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
         unsigned int irq_mask = 1 << get_gpio_index(gpio);
         u32 trigger = irqd_get_trigger_type(d);
+        unsigned long flags;
 
+        spin_lock_irqsave(&bank->lock, flags);
         if (trigger)
                 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
 
@@ -1173,6 +1173,7 @@ static void gpio_unmask_irq(struct irq_data *d)
         }
 
         _set_gpio_irqenable(bank, gpio, 1);
+        spin_unlock_irqrestore(&bank->lock, flags);
 }
 
 static struct irq_chip gpio_irq_chip = {
@@ -1524,7 +1525,7 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id)
         }
 }
 
-static void __init omap_gpio_chip_init(struct gpio_bank *bank)
+static void __devinit omap_gpio_chip_init(struct gpio_bank *bank)
 {
         int j;
         static int gpio;