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authorHaojian Zhuang <haojian.zhuang@linaro.org>2013-02-17 06:42:47 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-03-06 23:27:29 -0500
commit86853c83e33738397564e9377ceeff94d4bc041c (patch)
tree94b4df911227c48b62ace647d0989a2b4da0d019 /drivers/gpio
parente3929714942b242ecb55657e70d51e0eb4c77726 (diff)
gpio: add gpio offset in gpio range cells property
Add gpio offset into "gpio-range-cells" property. It's used to support sparse pinctrl range in gpio chip. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpiolib-of.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index a71a54a3e3f7..892040ad0095 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -203,22 +203,11 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip)
203 if (!pctldev) 203 if (!pctldev)
204 break; 204 break;
205 205
206 /*
207 * This assumes that the n GPIO pins are consecutive in the
208 * GPIO number space, and that the pins are also consecutive
209 * in their local number space. Currently it is not possible
210 * to add different ranges for one and the same GPIO chip,
211 * as the code assumes that we have one consecutive range
212 * on both, mapping 1-to-1.
213 *
214 * TODO: make the OF bindings handle multiple sparse ranges
215 * on the same GPIO chip.
216 */
217 ret = gpiochip_add_pin_range(chip, 206 ret = gpiochip_add_pin_range(chip,
218 pinctrl_dev_get_devname(pctldev), 207 pinctrl_dev_get_devname(pctldev),
219 0, /* offset in gpiochip */
220 pinspec.args[0], 208 pinspec.args[0],
221 pinspec.args[1]); 209 pinspec.args[1],
210 pinspec.args[2]);
222 211
223 if (ret) 212 if (ret)
224 break; 213 break;