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authorArnd Bergmann <arnd@arndb.de>2011-10-20 12:26:05 -0400
committerArnd Bergmann <arnd@arndb.de>2011-10-20 12:26:05 -0400
commit11f0d9311c6e9ed928dc98ce6e9d14c0ee274b05 (patch)
tree2bdb21608485c63d9a8de0e5445fa9bfc537b8d9 /drivers/gpio
parent1faca4ced8594d3586302e8d1788a60932f2bbca (diff)
parentfbe92fcc7570eaba4bd5786cb1bbc5e693dba6bd (diff)
Merge branch 'samsung/devel' into next/devel2
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-samsung.c48
1 files changed, 36 insertions, 12 deletions
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index b6be77ae4973..866251852719 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -318,6 +318,7 @@ static unsigned samsung_gpio_getcfg_4bit(struct samsung_gpio_chip *chip,
318 return S3C_GPIO_SPECIAL(con); 318 return S3C_GPIO_SPECIAL(con);
319} 319}
320 320
321#ifdef CONFIG_PLAT_S3C24XX
321/* 322/*
322 * s3c24xx_gpio_setcfg_abank - S3C24XX style GPIO configuration (Bank A) 323 * s3c24xx_gpio_setcfg_abank - S3C24XX style GPIO configuration (Bank A)
323 * @chip: The gpio chip that is being configured. 324 * @chip: The gpio chip that is being configured.
@@ -379,7 +380,9 @@ static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip,
379 380
380 return S3C_GPIO_SFN(con); 381 return S3C_GPIO_SFN(con);
381} 382}
383#endif
382 384
385#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)
383static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip, 386static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip,
384 unsigned int off, unsigned int cfg) 387 unsigned int off, unsigned int cfg)
385{ 388{
@@ -417,6 +420,7 @@ static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip,
417 420
418 return 0; 421 return 0;
419} 422}
423#endif
420 424
421static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, 425static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg,
422 int nr_chips) 426 int nr_chips)
@@ -438,10 +442,12 @@ struct samsung_gpio_cfg s3c24xx_gpiocfg_default = {
438 .get_config = samsung_gpio_getcfg_2bit, 442 .get_config = samsung_gpio_getcfg_2bit,
439}; 443};
440 444
445#ifdef CONFIG_PLAT_S3C24XX
441static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = { 446static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = {
442 .set_config = s3c24xx_gpio_setcfg_abank, 447 .set_config = s3c24xx_gpio_setcfg_abank,
443 .get_config = s3c24xx_gpio_getcfg_abank, 448 .get_config = s3c24xx_gpio_getcfg_abank,
444}; 449};
450#endif
445 451
446static struct samsung_gpio_cfg exynos4_gpio_cfg = { 452static struct samsung_gpio_cfg exynos4_gpio_cfg = {
447 .set_pull = exynos4_gpio_setpull, 453 .set_pull = exynos4_gpio_setpull,
@@ -450,6 +456,7 @@ static struct samsung_gpio_cfg exynos4_gpio_cfg = {
450 .get_config = samsung_gpio_getcfg_4bit, 456 .get_config = samsung_gpio_getcfg_4bit,
451}; 457};
452 458
459#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)
453static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = { 460static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = {
454 .cfg_eint = 0x3, 461 .cfg_eint = 0x3,
455 .set_config = s5p64x0_gpio_setcfg_rbank, 462 .set_config = s5p64x0_gpio_setcfg_rbank,
@@ -457,6 +464,7 @@ static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = {
457 .set_pull = samsung_gpio_setpull_updown, 464 .set_pull = samsung_gpio_setpull_updown,
458 .get_pull = samsung_gpio_getpull_updown, 465 .get_pull = samsung_gpio_getpull_updown,
459}; 466};
467#endif
460 468
461static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { 469static struct samsung_gpio_cfg samsung_gpio_cfgs[] = {
462 { 470 {
@@ -482,7 +490,14 @@ static struct samsung_gpio_cfg samsung_gpio_cfgs[] = {
482 }, { 490 }, {
483 .set_config = samsung_gpio_setcfg_2bit, 491 .set_config = samsung_gpio_setcfg_2bit,
484 .get_config = samsung_gpio_getcfg_2bit, 492 .get_config = samsung_gpio_getcfg_2bit,
485 }, 493 }, {
494 .set_pull = exynos4_gpio_setpull,
495 .get_pull = exynos4_gpio_getpull,
496 }, {
497 .cfg_eint = 0x3,
498 .set_pull = exynos4_gpio_setpull,
499 .get_pull = exynos4_gpio_getpull,
500 }
486}; 501};
487 502
488/* 503/*
@@ -682,6 +697,7 @@ static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip,
682 return 0; 697 return 0;
683} 698}
684 699
700#ifdef CONFIG_PLAT_S3C24XX
685/* The next set of routines are for the case of s3c24xx bank a */ 701/* The next set of routines are for the case of s3c24xx bank a */
686 702
687static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) 703static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
@@ -717,6 +733,7 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
717 local_irq_restore(flags); 733 local_irq_restore(flags);
718 return 0; 734 return 0;
719} 735}
736#endif
720 737
721/* The next set of routines are for the case of s5p64x0 bank r */ 738/* The next set of routines are for the case of s5p64x0 bank r */
722 739
@@ -914,6 +931,10 @@ static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip,
914 struct gpio_chip *gc = &chip->chip; 931 struct gpio_chip *gc = &chip->chip;
915 932
916 for (i = 0 ; i < nr_chips; i++, chip++) { 933 for (i = 0 ; i < nr_chips; i++, chip++) {
934 /* skip banks not present on SoC */
935 if (chip->chip.base >= S3C_GPIO_END)
936 continue;
937
917 if (!chip->config) 938 if (!chip->config)
918 chip->config = &s3c24xx_gpiocfg_default; 939 chip->config = &s3c24xx_gpiocfg_default;
919 if (!chip->pm) 940 if (!chip->pm)
@@ -2249,49 +2270,49 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = {
2249 .label = "GPL2", 2270 .label = "GPL2",
2250 }, 2271 },
2251 }, { 2272 }, {
2252 .config = &samsung_gpio_cfgs[0], 2273 .config = &samsung_gpio_cfgs[8],
2253 .chip = { 2274 .chip = {
2254 .base = EXYNOS4_GPY0(0), 2275 .base = EXYNOS4_GPY0(0),
2255 .ngpio = EXYNOS4_GPIO_Y0_NR, 2276 .ngpio = EXYNOS4_GPIO_Y0_NR,
2256 .label = "GPY0", 2277 .label = "GPY0",
2257 }, 2278 },
2258 }, { 2279 }, {
2259 .config = &samsung_gpio_cfgs[0], 2280 .config = &samsung_gpio_cfgs[8],
2260 .chip = { 2281 .chip = {
2261 .base = EXYNOS4_GPY1(0), 2282 .base = EXYNOS4_GPY1(0),
2262 .ngpio = EXYNOS4_GPIO_Y1_NR, 2283 .ngpio = EXYNOS4_GPIO_Y1_NR,
2263 .label = "GPY1", 2284 .label = "GPY1",
2264 }, 2285 },
2265 }, { 2286 }, {
2266 .config = &samsung_gpio_cfgs[0], 2287 .config = &samsung_gpio_cfgs[8],
2267 .chip = { 2288 .chip = {
2268 .base = EXYNOS4_GPY2(0), 2289 .base = EXYNOS4_GPY2(0),
2269 .ngpio = EXYNOS4_GPIO_Y2_NR, 2290 .ngpio = EXYNOS4_GPIO_Y2_NR,
2270 .label = "GPY2", 2291 .label = "GPY2",
2271 }, 2292 },
2272 }, { 2293 }, {
2273 .config = &samsung_gpio_cfgs[0], 2294 .config = &samsung_gpio_cfgs[8],
2274 .chip = { 2295 .chip = {
2275 .base = EXYNOS4_GPY3(0), 2296 .base = EXYNOS4_GPY3(0),
2276 .ngpio = EXYNOS4_GPIO_Y3_NR, 2297 .ngpio = EXYNOS4_GPIO_Y3_NR,
2277 .label = "GPY3", 2298 .label = "GPY3",
2278 }, 2299 },
2279 }, { 2300 }, {
2280 .config = &samsung_gpio_cfgs[0], 2301 .config = &samsung_gpio_cfgs[8],
2281 .chip = { 2302 .chip = {
2282 .base = EXYNOS4_GPY4(0), 2303 .base = EXYNOS4_GPY4(0),
2283 .ngpio = EXYNOS4_GPIO_Y4_NR, 2304 .ngpio = EXYNOS4_GPIO_Y4_NR,
2284 .label = "GPY4", 2305 .label = "GPY4",
2285 }, 2306 },
2286 }, { 2307 }, {
2287 .config = &samsung_gpio_cfgs[0], 2308 .config = &samsung_gpio_cfgs[8],
2288 .chip = { 2309 .chip = {
2289 .base = EXYNOS4_GPY5(0), 2310 .base = EXYNOS4_GPY5(0),
2290 .ngpio = EXYNOS4_GPIO_Y5_NR, 2311 .ngpio = EXYNOS4_GPIO_Y5_NR,
2291 .label = "GPY5", 2312 .label = "GPY5",
2292 }, 2313 },
2293 }, { 2314 }, {
2294 .config = &samsung_gpio_cfgs[0], 2315 .config = &samsung_gpio_cfgs[8],
2295 .chip = { 2316 .chip = {
2296 .base = EXYNOS4_GPY6(0), 2317 .base = EXYNOS4_GPY6(0),
2297 .ngpio = EXYNOS4_GPIO_Y6_NR, 2318 .ngpio = EXYNOS4_GPIO_Y6_NR,
@@ -2299,7 +2320,7 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = {
2299 }, 2320 },
2300 }, { 2321 }, {
2301 .base = (S5P_VA_GPIO2 + 0xC00), 2322 .base = (S5P_VA_GPIO2 + 0xC00),
2302 .config = &samsung_gpio_cfgs[3], 2323 .config = &samsung_gpio_cfgs[9],
2303 .irq_base = IRQ_EINT(0), 2324 .irq_base = IRQ_EINT(0),
2304 .chip = { 2325 .chip = {
2305 .base = EXYNOS4_GPX0(0), 2326 .base = EXYNOS4_GPX0(0),
@@ -2309,7 +2330,7 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = {
2309 }, 2330 },
2310 }, { 2331 }, {
2311 .base = (S5P_VA_GPIO2 + 0xC20), 2332 .base = (S5P_VA_GPIO2 + 0xC20),
2312 .config = &samsung_gpio_cfgs[3], 2333 .config = &samsung_gpio_cfgs[9],
2313 .irq_base = IRQ_EINT(8), 2334 .irq_base = IRQ_EINT(8),
2314 .chip = { 2335 .chip = {
2315 .base = EXYNOS4_GPX1(0), 2336 .base = EXYNOS4_GPX1(0),
@@ -2319,7 +2340,7 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = {
2319 }, 2340 },
2320 }, { 2341 }, {
2321 .base = (S5P_VA_GPIO2 + 0xC40), 2342 .base = (S5P_VA_GPIO2 + 0xC40),
2322 .config = &samsung_gpio_cfgs[3], 2343 .config = &samsung_gpio_cfgs[9],
2323 .irq_base = IRQ_EINT(16), 2344 .irq_base = IRQ_EINT(16),
2324 .chip = { 2345 .chip = {
2325 .base = EXYNOS4_GPX2(0), 2346 .base = EXYNOS4_GPX2(0),
@@ -2329,7 +2350,7 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = {
2329 }, 2350 },
2330 }, { 2351 }, {
2331 .base = (S5P_VA_GPIO2 + 0xC60), 2352 .base = (S5P_VA_GPIO2 + 0xC60),
2332 .config = &samsung_gpio_cfgs[3], 2353 .config = &samsung_gpio_cfgs[9],
2333 .irq_base = IRQ_EINT(24), 2354 .irq_base = IRQ_EINT(24),
2334 .chip = { 2355 .chip = {
2335 .base = EXYNOS4_GPX3(0), 2356 .base = EXYNOS4_GPX3(0),
@@ -2465,6 +2486,9 @@ static __init int samsung_gpiolib_init(void)
2465 s5p_register_gpioint_bank(IRQ_GPIO_XA, 0, IRQ_GPIO1_NR_GROUPS); 2486 s5p_register_gpioint_bank(IRQ_GPIO_XA, 0, IRQ_GPIO1_NR_GROUPS);
2466 s5p_register_gpioint_bank(IRQ_GPIO_XB, IRQ_GPIO1_NR_GROUPS, IRQ_GPIO2_NR_GROUPS); 2487 s5p_register_gpioint_bank(IRQ_GPIO_XB, IRQ_GPIO1_NR_GROUPS, IRQ_GPIO2_NR_GROUPS);
2467#endif 2488#endif
2489 } else {
2490 WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n");
2491 return -ENODEV;
2468 } 2492 }
2469 2493
2470 return 0; 2494 return 0;