Merge tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Main pin control pull request for the v3.13 cycle.

  The changes hitting arch/blackfin are ACKed by the Blackfin
  maintainer, and the device tree bindings are ACKed to the extent
  possible by someone from the device tree maintainers group.

   - Blackfin ADI pin control driver, we move yet another architecture
     under this subsystem umbrella.

   - Incremental updates to the Renesas Super-H PFC pin control driver.
     New subdriver for the r8a7791 SoC.

   - Non-linear GPIO ranges from the gpiolib side of things, this
     enabled simplified device tree bindings by referring entire groups
     of pins on some pin controller to act as back-end for a certain
     GPIO-chip driver.

   - Add the Abilis TB10x pin control driver used on the ARC
     architecture.  Also the corresponding GPIO driver is merged through
     this tree, so the ARC has full support for pins and GPIOs after
     this.

   - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller
     instances.  The i.MX1 and i.MX27 is an entirely new family
     (silicon) of controllers whereas i.MX50 is a variant of the
     previous supported controller.

   - Then the usual slew of fixes, cleanups and incremental updates"

The ARC DT changes are apparently still pending, that hopefully gets
sorted out in a timely manner.

* tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
  pinctrl: imx50: add pinctrl support code for the IMX50 SoC
  pinctrl: at91: copy define to driver
  pinctrl: remove minor dead code
  pinctrl: imx: fix using pin->input_val wrongly
  pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe()
  gpio: tb10x: fix return value check in tb10x_gpio_probe()
  gpio: tb10x: use module_platform_driver to simplify the code
  pinctrl: imx27: imx27 pincontrol driver
  pinctrl: imx1 core driver
  pinctrl: sh-pfc: r8a7791 PFC support
  sh-pfc: r8a7778: Add CAN pin groups
  gpio: add TB10x GPIO driver
  pinctrl: at91: correct a few typos
  pinctrl: mvebu: remove redundant of_match_ptr
  pinctrl: tb10x: use module_platform_driver to simplify the code
  pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe()
  pinctrl: add documentation for pinctrl_get_group_pins()
  pinctrl: rockchip: emulate both edge triggered interrupts
  pinctrl: rockchip: add rk3188 specifics
  pinctrl: rockchip: remove redundant check
  ...

1 files changed, 55 insertions, 8 deletions

diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 0dfaf20e4dad..e78760921bd7 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -190,10 +190,15 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip)
         struct of_phandle_args pinspec;
         struct pinctrl_dev *pctldev;
         int index = 0, ret;
+        const char *name;
+        static const char group_names_propname[] = "gpio-ranges-group-names";
+        struct property *group_names;
 
         if (!np)
                 return;
 
+        group_names = of_find_property(np, group_names_propname, NULL);
+
         for (;; index++) {
                 ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
                                 index, &pinspec);
@@ -204,14 +209,56 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip)
                 if (!pctldev)
                         break;
 
-                ret = gpiochip_add_pin_range(chip,
-                                             pinctrl_dev_get_devname(pctldev),
-                                             pinspec.args[0],
-                                             pinspec.args[1],
-                                             pinspec.args[2]);
-
-                if (ret)
-                        break;
+                if (pinspec.args[2]) {
+                        if (group_names) {
+                                ret = of_property_read_string_index(np,
+                                                group_names_propname,
+                                                index, &name);
+                                if (strlen(name)) {
+                                        pr_err("%s: Group name of numeric GPIO ranges must be the empty string.\n",
+                                                np->full_name);
+                                        break;
+                                }
+                        }
+                        /* npins != 0: linear range */
+                        ret = gpiochip_add_pin_range(chip,
+                                        pinctrl_dev_get_devname(pctldev),
+                                        pinspec.args[0],
+                                        pinspec.args[1],
+                                        pinspec.args[2]);
+                        if (ret)
+                                break;
+                } else {
+                        /* npins == 0: special range */
+                        if (pinspec.args[1]) {
+                                pr_err("%s: Illegal gpio-range format.\n",
+                                        np->full_name);
+                                break;
+                        }
+
+                        if (!group_names) {
+                                pr_err("%s: GPIO group range requested but no %s property.\n",
+                                        np->full_name, group_names_propname);
+                                break;
+                        }
+
+                        ret = of_property_read_string_index(np,
+                                                group_names_propname,
+                                                index, &name);
+                        if (ret)
+                                break;
+
+                        if (!strlen(name)) {
+                                pr_err("%s: Group name of GPIO group range cannot be the empty string.\n",
+                                np->full_name);
+                                break;
+                        }
+
+                        ret = gpiochip_add_pingroup_range(chip, pctldev,
+                                                pinspec.args[0], name);
+                        if (ret)
+                                break;
+                }
         }
 }