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authorTomoya MORINAGA <tomoya-linux@dsn.okisemi.com>2011-07-20 20:19:55 -0400
committerGrant Likely <grant.likely@secretlab.ca>2011-10-05 13:59:17 -0400
commitd568a6814fde60f5ab6b0c29b6261ff1899da443 (patch)
treeb16d48eb1460b022e8d2b7819c85a2bef535568c /drivers/gpio/gpio-pch.c
parent829e8256f139a9665f861d7ba880ed90abd75b65 (diff)
gpio-pch: add spinlock in suspend/resume processing
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio/gpio-pch.c')
-rw-r--r--drivers/gpio/gpio-pch.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c
index ca9c7b051e07..252bddbd3f44 100644
--- a/drivers/gpio/gpio-pch.c
+++ b/drivers/gpio/gpio-pch.c
@@ -55,6 +55,9 @@ struct pch_gpio_reg_data {
55 * @gpio: Data for GPIO infrastructure. 55 * @gpio: Data for GPIO infrastructure.
56 * @pch_gpio_reg: Memory mapped Register data is saved here 56 * @pch_gpio_reg: Memory mapped Register data is saved here
57 * when suspend. 57 * when suspend.
58 * @spinlock: Used for register access protection in
59 * interrupt context pch_irq_mask,
60 * pch_irq_unmask and pch_irq_type;
58 */ 61 */
59struct pch_gpio { 62struct pch_gpio {
60 void __iomem *base; 63 void __iomem *base;
@@ -63,6 +66,7 @@ struct pch_gpio {
63 struct gpio_chip gpio; 66 struct gpio_chip gpio;
64 struct pch_gpio_reg_data pch_gpio_reg; 67 struct pch_gpio_reg_data pch_gpio_reg;
65 struct mutex lock; 68 struct mutex lock;
69 spinlock_t spinlock;
66}; 70};
67 71
68static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) 72static void pch_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)
@@ -239,8 +243,11 @@ static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state)
239{ 243{
240 s32 ret; 244 s32 ret;
241 struct pch_gpio *chip = pci_get_drvdata(pdev); 245 struct pch_gpio *chip = pci_get_drvdata(pdev);
246 unsigned long flags;
242 247
248 spin_lock_irqsave(&chip->spinlock, flags);
243 pch_gpio_save_reg_conf(chip); 249 pch_gpio_save_reg_conf(chip);
250 spin_unlock_irqrestore(&chip->spinlock, flags);
244 251
245 ret = pci_save_state(pdev); 252 ret = pci_save_state(pdev);
246 if (ret) { 253 if (ret) {
@@ -260,6 +267,7 @@ static int pch_gpio_resume(struct pci_dev *pdev)
260{ 267{
261 s32 ret; 268 s32 ret;
262 struct pch_gpio *chip = pci_get_drvdata(pdev); 269 struct pch_gpio *chip = pci_get_drvdata(pdev);
270 unsigned long flags;
263 271
264 ret = pci_enable_wake(pdev, PCI_D0, 0); 272 ret = pci_enable_wake(pdev, PCI_D0, 0);
265 273
@@ -271,9 +279,11 @@ static int pch_gpio_resume(struct pci_dev *pdev)
271 } 279 }
272 pci_restore_state(pdev); 280 pci_restore_state(pdev);
273 281
282 spin_lock_irqsave(&chip->spinlock, flags);
274 iowrite32(0x01, &chip->reg->reset); 283 iowrite32(0x01, &chip->reg->reset);
275 iowrite32(0x00, &chip->reg->reset); 284 iowrite32(0x00, &chip->reg->reset);
276 pch_gpio_restore_reg_conf(chip); 285 pch_gpio_restore_reg_conf(chip);
286 spin_unlock_irqrestore(&chip->spinlock, flags);
277 287
278 return 0; 288 return 0;
279} 289}