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authorBorislav Petkov <borislav.petkov@amd.com>2010-03-15 14:39:18 -0400
committerBorislav Petkov <borislav.petkov@amd.com>2010-08-03 10:14:01 -0400
commit695426506ebba6acc87843cca075595a775e8866 (patch)
tree4b6eba976a01ecc55c6c8d88d6ad8164d8bf769e /drivers/edac
parent935ab88e341ccb1507b2b0b1f1e9adcbbd693265 (diff)
amd64_edac: Remove unneeded defines
All F2x110-related bit defines are used at only one place so replace them with simple BIT() macros. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Acked-by: Doug Thompson <dougthompson@xmission.com>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/amd64_edac.h43
1 files changed, 8 insertions, 35 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 707745b36733..613b9381e71a 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -244,44 +244,17 @@
244 244
245 245
246#define F10_DCTL_SEL_LOW 0x110 246#define F10_DCTL_SEL_LOW 0x110
247 247#define dct_sel_baseaddr(pvt) ((pvt->dram_ctl_select_low) & 0xFFFFF800)
248#define dct_sel_baseaddr(pvt) \ 248#define dct_sel_interleave_addr(pvt) (((pvt->dram_ctl_select_low) >> 6) & 0x3)
249 ((pvt->dram_ctl_select_low) & 0xFFFFF800) 249#define dct_high_range_enabled(pvt) (pvt->dram_ctl_select_low & BIT(0))
250 250#define dct_interleave_enabled(pvt) (pvt->dram_ctl_select_low & BIT(2))
251#define dct_sel_interleave_addr(pvt) \ 251#define dct_ganging_enabled(pvt) (pvt->dram_ctl_select_low & BIT(4))
252 (((pvt->dram_ctl_select_low) >> 6) & 0x3) 252#define dct_data_intlv_enabled(pvt) (pvt->dram_ctl_select_low & BIT(5))
253 253#define dct_dram_enabled(pvt) (pvt->dram_ctl_select_low & BIT(8))
254enum { 254#define dct_memory_cleared(pvt) (pvt->dram_ctl_select_low & BIT(10))
255 F10_DCTL_SEL_LOW_DctSelHiRngEn = BIT(0),
256 F10_DCTL_SEL_LOW_DctSelIntLvEn = BIT(2),
257 F10_DCTL_SEL_LOW_DctGangEn = BIT(4),
258 F10_DCTL_SEL_LOW_DctDatIntLv = BIT(5),
259 F10_DCTL_SEL_LOW_DramEnable = BIT(8),
260 F10_DCTL_SEL_LOW_MemCleared = BIT(10),
261};
262
263#define dct_high_range_enabled(pvt) \
264 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelHiRngEn)
265
266#define dct_interleave_enabled(pvt) \
267 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelIntLvEn)
268
269#define dct_ganging_enabled(pvt) \
270 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctGangEn)
271
272#define dct_data_intlv_enabled(pvt) \
273 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctDatIntLv)
274
275#define dct_dram_enabled(pvt) \
276 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DramEnable)
277
278#define dct_memory_cleared(pvt) \
279 (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_MemCleared)
280
281 255
282#define F10_DCTL_SEL_HIGH 0x114 256#define F10_DCTL_SEL_HIGH 0x114
283 257
284
285/* 258/*
286 * Function 3 - Misc Control 259 * Function 3 - Misc Control
287 */ 260 */