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authorJoe Perches <joe@perches.com>2012-04-29 16:08:39 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-06-11 12:23:49 -0400
commit956b9ba156dbfdb9cede2b2927ddf8be2233b3a7 (patch)
tree6ece471eee029a1ca83ce649f7dc23020ebef182 /drivers/edac/i7300_edac.c
parent7e881856eee8b889b76cd1d8e04ce2fc79b72099 (diff)
edac: Convert debugfX to edac_dbg(X,
Use a more common debugging style. Remove __FILE__ uses, add missing newlines, coalesce formats and align arguments. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/i7300_edac.c')
-rw-r--r--drivers/edac/i7300_edac.c151
1 files changed, 74 insertions, 77 deletions
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
index 7eca688f7885..738b8919194f 100644
--- a/drivers/edac/i7300_edac.c
+++ b/drivers/edac/i7300_edac.c
@@ -596,9 +596,8 @@ static int decode_mtr(struct i7300_pvt *pvt,
596 mtr = pvt->mtr[slot][branch]; 596 mtr = pvt->mtr[slot][branch];
597 ans = MTR_DIMMS_PRESENT(mtr) ? 1 : 0; 597 ans = MTR_DIMMS_PRESENT(mtr) ? 1 : 0;
598 598
599 debugf2("\tMTR%d CH%d: DIMMs are %s (mtr)\n", 599 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n",
600 slot, channel, 600 slot, channel, ans ? "" : "NOT ");
601 ans ? "Present" : "NOT Present");
602 601
603 /* Determine if there is a DIMM present in this DIMM slot */ 602 /* Determine if there is a DIMM present in this DIMM slot */
604 if (!ans) 603 if (!ans)
@@ -620,24 +619,25 @@ static int decode_mtr(struct i7300_pvt *pvt,
620 619
621 dinfo->megabytes = 1 << addrBits; 620 dinfo->megabytes = 1 << addrBits;
622 621
623 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); 622 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
624 623
625 debugf2("\t\tELECTRICAL THROTTLING is %s\n", 624 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n",
626 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled"); 625 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
627 626
628 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); 627 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
629 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANKS(mtr) ? "double" : "single"); 628 edac_dbg(2, "\t\tNUMRANK: %s\n",
630 debugf2("\t\tNUMROW: %s\n", 629 MTR_DIMM_RANKS(mtr) ? "double" : "single");
631 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" : 630 edac_dbg(2, "\t\tNUMROW: %s\n",
632 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" : 631 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
633 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" : 632 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
634 "65,536 - 16 rows"); 633 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
635 debugf2("\t\tNUMCOL: %s\n", 634 "65,536 - 16 rows");
636 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" : 635 edac_dbg(2, "\t\tNUMCOL: %s\n",
637 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" : 636 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
638 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" : 637 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
639 "reserved"); 638 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
640 debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); 639 "reserved");
640 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes);
641 641
642 /* 642 /*
643 * The type of error detection actually depends of the 643 * The type of error detection actually depends of the
@@ -653,9 +653,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
653 dimm->mtype = MEM_FB_DDR2; 653 dimm->mtype = MEM_FB_DDR2;
654 if (IS_SINGLE_MODE(pvt->mc_settings_a)) { 654 if (IS_SINGLE_MODE(pvt->mc_settings_a)) {
655 dimm->edac_mode = EDAC_SECDED; 655 dimm->edac_mode = EDAC_SECDED;
656 debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); 656 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
657 } else { 657 } else {
658 debugf2("\t\tECC code is on Lockstep mode\n"); 658 edac_dbg(2, "\t\tECC code is on Lockstep mode\n");
659 if (MTR_DRAM_WIDTH(mtr) == 8) 659 if (MTR_DRAM_WIDTH(mtr) == 8)
660 dimm->edac_mode = EDAC_S8ECD8ED; 660 dimm->edac_mode = EDAC_S8ECD8ED;
661 else 661 else
@@ -664,9 +664,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
664 664
665 /* ask what device type on this row */ 665 /* ask what device type on this row */
666 if (MTR_DRAM_WIDTH(mtr) == 8) { 666 if (MTR_DRAM_WIDTH(mtr) == 8) {
667 debugf2("\t\tScrub algorithm for x8 is on %s mode\n", 667 edac_dbg(2, "\t\tScrub algorithm for x8 is on %s mode\n",
668 IS_SCRBALGO_ENHANCED(pvt->mc_settings) ? 668 IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
669 "enhanced" : "normal"); 669 "enhanced" : "normal");
670 670
671 dimm->dtype = DEV_X8; 671 dimm->dtype = DEV_X8;
672 } else 672 } else
@@ -700,14 +700,14 @@ static void print_dimm_size(struct i7300_pvt *pvt)
700 p += n; 700 p += n;
701 space -= n; 701 space -= n;
702 } 702 }
703 debugf2("%s\n", pvt->tmp_prt_buffer); 703 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
704 p = pvt->tmp_prt_buffer; 704 p = pvt->tmp_prt_buffer;
705 space = PAGE_SIZE; 705 space = PAGE_SIZE;
706 n = snprintf(p, space, "-------------------------------" 706 n = snprintf(p, space, "-------------------------------"
707 "------------------------------"); 707 "------------------------------");
708 p += n; 708 p += n;
709 space -= n; 709 space -= n;
710 debugf2("%s\n", pvt->tmp_prt_buffer); 710 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
711 p = pvt->tmp_prt_buffer; 711 p = pvt->tmp_prt_buffer;
712 space = PAGE_SIZE; 712 space = PAGE_SIZE;
713 713
@@ -723,7 +723,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
723 space -= n; 723 space -= n;
724 } 724 }
725 725
726 debugf2("%s\n", pvt->tmp_prt_buffer); 726 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
727 p = pvt->tmp_prt_buffer; 727 p = pvt->tmp_prt_buffer;
728 space = PAGE_SIZE; 728 space = PAGE_SIZE;
729 } 729 }
@@ -732,7 +732,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
732 "------------------------------"); 732 "------------------------------");
733 p += n; 733 p += n;
734 space -= n; 734 space -= n;
735 debugf2("%s\n", pvt->tmp_prt_buffer); 735 edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
736 p = pvt->tmp_prt_buffer; 736 p = pvt->tmp_prt_buffer;
737 space = PAGE_SIZE; 737 space = PAGE_SIZE;
738#endif 738#endif
@@ -755,7 +755,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
755 755
756 pvt = mci->pvt_info; 756 pvt = mci->pvt_info;
757 757
758 debugf2("Memory Technology Registers:\n"); 758 edac_dbg(2, "Memory Technology Registers:\n");
759 759
760 /* Get the AMB present registers for the four channels */ 760 /* Get the AMB present registers for the four channels */
761 for (branch = 0; branch < MAX_BRANCHES; branch++) { 761 for (branch = 0; branch < MAX_BRANCHES; branch++) {
@@ -764,15 +764,15 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
764 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch], 764 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
765 AMBPRESENT_0, 765 AMBPRESENT_0,
766 &pvt->ambpresent[channel]); 766 &pvt->ambpresent[channel]);
767 debugf2("\t\tAMB-present CH%d = 0x%x:\n", 767 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
768 channel, pvt->ambpresent[channel]); 768 channel, pvt->ambpresent[channel]);
769 769
770 channel = to_channel(1, branch); 770 channel = to_channel(1, branch);
771 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch], 771 pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
772 AMBPRESENT_1, 772 AMBPRESENT_1,
773 &pvt->ambpresent[channel]); 773 &pvt->ambpresent[channel]);
774 debugf2("\t\tAMB-present CH%d = 0x%x:\n", 774 edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
775 channel, pvt->ambpresent[channel]); 775 channel, pvt->ambpresent[channel]);
776 } 776 }
777 777
778 /* Get the set of MTR[0-7] regs by each branch */ 778 /* Get the set of MTR[0-7] regs by each branch */
@@ -814,12 +814,11 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
814static void decode_mir(int mir_no, u16 mir[MAX_MIR]) 814static void decode_mir(int mir_no, u16 mir[MAX_MIR])
815{ 815{
816 if (mir[mir_no] & 3) 816 if (mir[mir_no] & 3)
817 debugf2("MIR%d: limit= 0x%x Branch(es) that participate:" 817 edac_dbg(2, "MIR%d: limit= 0x%x Branch(es) that participate: %s %s\n",
818 " %s %s\n", 818 mir_no,
819 mir_no, 819 (mir[mir_no] >> 4) & 0xfff,
820 (mir[mir_no] >> 4) & 0xfff, 820 (mir[mir_no] & 1) ? "B0" : "",
821 (mir[mir_no] & 1) ? "B0" : "", 821 (mir[mir_no] & 2) ? "B1" : "");
822 (mir[mir_no] & 2) ? "B1" : "");
823} 822}
824 823
825/** 824/**
@@ -839,17 +838,17 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
839 pci_read_config_dword(pvt->pci_dev_16_0_fsb_ctlr, AMBASE, 838 pci_read_config_dword(pvt->pci_dev_16_0_fsb_ctlr, AMBASE,
840 (u32 *) &pvt->ambase); 839 (u32 *) &pvt->ambase);
841 840
842 debugf2("AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase); 841 edac_dbg(2, "AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase);
843 842
844 /* Get the Branch Map regs */ 843 /* Get the Branch Map regs */
845 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, TOLM, &pvt->tolm); 844 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, TOLM, &pvt->tolm);
846 pvt->tolm >>= 12; 845 pvt->tolm >>= 12;
847 debugf2("TOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm, 846 edac_dbg(2, "TOLM (number of 256M regions) =%u (0x%x)\n",
848 pvt->tolm); 847 pvt->tolm, pvt->tolm);
849 848
850 actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28)); 849 actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28));
851 debugf2("Actual TOLM byte addr=%u.%03u GB (0x%x)\n", 850 edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
852 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28); 851 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
853 852
854 /* Get memory controller settings */ 853 /* Get memory controller settings */
855 pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS, 854 pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS,
@@ -858,15 +857,15 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
858 &pvt->mc_settings_a); 857 &pvt->mc_settings_a);
859 858
860 if (IS_SINGLE_MODE(pvt->mc_settings_a)) 859 if (IS_SINGLE_MODE(pvt->mc_settings_a))
861 debugf0("Memory controller operating on single mode\n"); 860 edac_dbg(0, "Memory controller operating on single mode\n");
862 else 861 else
863 debugf0("Memory controller operating on %s mode\n", 862 edac_dbg(0, "Memory controller operating on %smirrored mode\n",
864 IS_MIRRORED(pvt->mc_settings) ? "mirrored" : "non-mirrored"); 863 IS_MIRRORED(pvt->mc_settings) ? "" : "non-");
865 864
866 debugf0("Error detection is %s\n", 865 edac_dbg(0, "Error detection is %s\n",
867 IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled"); 866 IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
868 debugf0("Retry is %s\n", 867 edac_dbg(0, "Retry is %s\n",
869 IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled"); 868 IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
870 869
871 /* Get Memory Interleave Range registers */ 870 /* Get Memory Interleave Range registers */
872 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0, 871 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0,
@@ -960,18 +959,18 @@ static int __devinit i7300_get_devices(struct mem_ctl_info *mci)
960 } 959 }
961 } 960 }
962 961
963 debugf1("System Address, processor bus- PCI Bus ID: %s %x:%x\n", 962 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n",
964 pci_name(pvt->pci_dev_16_0_fsb_ctlr), 963 pci_name(pvt->pci_dev_16_0_fsb_ctlr),
965 pvt->pci_dev_16_0_fsb_ctlr->vendor, 964 pvt->pci_dev_16_0_fsb_ctlr->vendor,
966 pvt->pci_dev_16_0_fsb_ctlr->device); 965 pvt->pci_dev_16_0_fsb_ctlr->device);
967 debugf1("Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", 966 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n",
968 pci_name(pvt->pci_dev_16_1_fsb_addr_map), 967 pci_name(pvt->pci_dev_16_1_fsb_addr_map),
969 pvt->pci_dev_16_1_fsb_addr_map->vendor, 968 pvt->pci_dev_16_1_fsb_addr_map->vendor,
970 pvt->pci_dev_16_1_fsb_addr_map->device); 969 pvt->pci_dev_16_1_fsb_addr_map->device);
971 debugf1("FSB Error Regs - PCI Bus ID: %s %x:%x\n", 970 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n",
972 pci_name(pvt->pci_dev_16_2_fsb_err_regs), 971 pci_name(pvt->pci_dev_16_2_fsb_err_regs),
973 pvt->pci_dev_16_2_fsb_err_regs->vendor, 972 pvt->pci_dev_16_2_fsb_err_regs->vendor,
974 pvt->pci_dev_16_2_fsb_err_regs->device); 973 pvt->pci_dev_16_2_fsb_err_regs->device);
975 974
976 pvt->pci_dev_2x_0_fbd_branch[0] = pci_get_device(PCI_VENDOR_ID_INTEL, 975 pvt->pci_dev_2x_0_fbd_branch[0] = pci_get_device(PCI_VENDOR_ID_INTEL,
977 PCI_DEVICE_ID_INTEL_I7300_MCH_FB0, 976 PCI_DEVICE_ID_INTEL_I7300_MCH_FB0,
@@ -1022,9 +1021,9 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
1022 if (rc == -EIO) 1021 if (rc == -EIO)
1023 return rc; 1022 return rc;
1024 1023
1025 debugf0("MC: pdev bus %u dev=0x%x fn=0x%x\n", 1024 edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
1026 pdev->bus->number, 1025 pdev->bus->number,
1027 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); 1026 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
1028 1027
1029 /* We only are looking for func 0 of the set */ 1028 /* We only are looking for func 0 of the set */
1030 if (PCI_FUNC(pdev->devfn) != 0) 1029 if (PCI_FUNC(pdev->devfn) != 0)
@@ -1044,7 +1043,7 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
1044 if (mci == NULL) 1043 if (mci == NULL)
1045 return -ENOMEM; 1044 return -ENOMEM;
1046 1045
1047 debugf0("MC: mci = %p\n", mci); 1046 edac_dbg(0, "MC: mci = %p\n", mci);
1048 1047
1049 mci->pdev = &pdev->dev; /* record ptr to the generic device */ 1048 mci->pdev = &pdev->dev; /* record ptr to the generic device */
1050 1049
@@ -1077,18 +1076,16 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
1077 /* initialize the MC control structure 'csrows' table 1076 /* initialize the MC control structure 'csrows' table
1078 * with the mapping and control information */ 1077 * with the mapping and control information */
1079 if (i7300_get_mc_regs(mci)) { 1078 if (i7300_get_mc_regs(mci)) {
1080 debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n" 1079 edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i7300_init_csrows() returned nonzero value\n");
1081 " because i7300_init_csrows() returned nonzero "
1082 "value\n");
1083 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */ 1080 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */
1084 } else { 1081 } else {
1085 debugf1("MC: Enable error reporting now\n"); 1082 edac_dbg(1, "MC: Enable error reporting now\n");
1086 i7300_enable_error_reporting(mci); 1083 i7300_enable_error_reporting(mci);
1087 } 1084 }
1088 1085
1089 /* add this new MC control structure to EDAC's list of MCs */ 1086 /* add this new MC control structure to EDAC's list of MCs */
1090 if (edac_mc_add_mc(mci)) { 1087 if (edac_mc_add_mc(mci)) {
1091 debugf0("MC: failed edac_mc_add_mc()\n"); 1088 edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
1092 /* FIXME: perhaps some code should go here that disables error 1089 /* FIXME: perhaps some code should go here that disables error
1093 * reporting if we just enabled it 1090 * reporting if we just enabled it
1094 */ 1091 */
@@ -1130,7 +1127,7 @@ static void __devexit i7300_remove_one(struct pci_dev *pdev)
1130 struct mem_ctl_info *mci; 1127 struct mem_ctl_info *mci;
1131 char *tmp; 1128 char *tmp;
1132 1129
1133 debugf0("\n"); 1130 edac_dbg(0, "\n");
1134 1131
1135 if (i7300_pci) 1132 if (i7300_pci)
1136 edac_pci_release_generic_ctl(i7300_pci); 1133 edac_pci_release_generic_ctl(i7300_pci);
@@ -1177,7 +1174,7 @@ static int __init i7300_init(void)
1177{ 1174{
1178 int pci_rc; 1175 int pci_rc;
1179 1176
1180 debugf2("\n"); 1177 edac_dbg(2, "\n");
1181 1178
1182 /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 1179 /* Ensure that the OPSTATE is set correctly for POLL or NMI */
1183 opstate_init(); 1180 opstate_init();
@@ -1192,7 +1189,7 @@ static int __init i7300_init(void)
1192 */ 1189 */
1193static void __exit i7300_exit(void) 1190static void __exit i7300_exit(void)
1194{ 1191{
1195 debugf2("\n"); 1192 edac_dbg(2, "\n");
1196 pci_unregister_driver(&i7300_driver); 1193 pci_unregister_driver(&i7300_driver);
1197} 1194}
1198 1195