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authorJoe Perches <joe@perches.com>2012-04-29 16:08:39 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-06-11 12:23:49 -0400
commit956b9ba156dbfdb9cede2b2927ddf8be2233b3a7 (patch)
tree6ece471eee029a1ca83ce649f7dc23020ebef182 /drivers/edac/edac_mc.c
parent7e881856eee8b889b76cd1d8e04ce2fc79b72099 (diff)
edac: Convert debugfX to edac_dbg(X,
Use a more common debugging style. Remove __FILE__ uses, add missing newlines, coalesce formats and align arguments. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/edac_mc.c')
-rw-r--r--drivers/edac/edac_mc.c121
1 files changed, 60 insertions, 61 deletions
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index 4df9c4ac63c3..a39fe6f966e3 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -46,56 +46,57 @@ static LIST_HEAD(mc_devices);
46 46
47static void edac_mc_dump_channel(struct rank_info *chan) 47static void edac_mc_dump_channel(struct rank_info *chan)
48{ 48{
49 debugf4("\tchannel = %p\n", chan); 49 edac_dbg(4, "\tchannel = %p\n", chan);
50 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); 50 edac_dbg(4, "\tchannel->chan_idx = %d\n", chan->chan_idx);
51 debugf4("\tchannel->csrow = %p\n\n", chan->csrow); 51 edac_dbg(4, "\tchannel->csrow = %p\n", chan->csrow);
52 debugf4("\tchannel->dimm = %p\n", chan->dimm); 52 edac_dbg(4, "\tchannel->dimm = %p\n", chan->dimm);
53} 53}
54 54
55static void edac_mc_dump_dimm(struct dimm_info *dimm) 55static void edac_mc_dump_dimm(struct dimm_info *dimm)
56{ 56{
57 int i; 57 int i;
58 58
59 debugf4("\tdimm = %p\n", dimm); 59 edac_dbg(4, "\tdimm = %p\n", dimm);
60 debugf4("\tdimm->label = '%s'\n", dimm->label); 60 edac_dbg(4, "\tdimm->label = '%s'\n", dimm->label);
61 debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages); 61 edac_dbg(4, "\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
62 debugf4("\tdimm location "); 62 edac_dbg(4, "\tdimm location ");
63 for (i = 0; i < dimm->mci->n_layers; i++) { 63 for (i = 0; i < dimm->mci->n_layers; i++) {
64 printk(KERN_CONT "%d", dimm->location[i]); 64 printk(KERN_CONT "%d", dimm->location[i]);
65 if (i < dimm->mci->n_layers - 1) 65 if (i < dimm->mci->n_layers - 1)
66 printk(KERN_CONT "."); 66 printk(KERN_CONT ".");
67 } 67 }
68 printk(KERN_CONT "\n"); 68 printk(KERN_CONT "\n");
69 debugf4("\tdimm->grain = %d\n", dimm->grain); 69 edac_dbg(4, "\tdimm->grain = %d\n", dimm->grain);
70 debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages); 70 edac_dbg(4, "\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
71} 71}
72 72
73static void edac_mc_dump_csrow(struct csrow_info *csrow) 73static void edac_mc_dump_csrow(struct csrow_info *csrow)
74{ 74{
75 debugf4("\tcsrow = %p\n", csrow); 75 edac_dbg(4, "\tcsrow = %p\n", csrow);
76 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx); 76 edac_dbg(4, "\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
77 debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page); 77 edac_dbg(4, "\tcsrow->first_page = 0x%lx\n", csrow->first_page);
78 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); 78 edac_dbg(4, "\tcsrow->last_page = 0x%lx\n", csrow->last_page);
79 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); 79 edac_dbg(4, "\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
80 debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels); 80 edac_dbg(4, "\tcsrow->nr_channels = %d\n", csrow->nr_channels);
81 debugf4("\tcsrow->channels = %p\n", csrow->channels); 81 edac_dbg(4, "\tcsrow->channels = %p\n", csrow->channels);
82 debugf4("\tcsrow->mci = %p\n\n", csrow->mci); 82 edac_dbg(4, "\tcsrow->mci = %p\n", csrow->mci);
83} 83}
84 84
85static void edac_mc_dump_mci(struct mem_ctl_info *mci) 85static void edac_mc_dump_mci(struct mem_ctl_info *mci)
86{ 86{
87 debugf3("\tmci = %p\n", mci); 87 edac_dbg(3, "\tmci = %p\n", mci);
88 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap); 88 edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
89 debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap); 89 edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
90 debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap); 90 edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
91 debugf4("\tmci->edac_check = %p\n", mci->edac_check); 91 edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
92 debugf3("\tmci->nr_csrows = %d, csrows = %p\n", 92 edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
93 mci->nr_csrows, mci->csrows); 93 mci->nr_csrows, mci->csrows);
94 debugf3("\tmci->nr_dimms = %d, dimms = %p\n", 94 edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
95 mci->tot_dimms, mci->dimms); 95 mci->tot_dimms, mci->dimms);
96 debugf3("\tdev = %p\n", mci->pdev); 96 edac_dbg(3, "\tdev = %p\n", mci->pdev);
97 debugf3("\tmod_name:ctl_name = %s:%s\n", mci->mod_name, mci->ctl_name); 97 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
98 debugf3("\tpvt_info = %p\n\n", mci->pvt_info); 98 mci->mod_name, mci->ctl_name);
99 edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
99} 100}
100 101
101#endif /* CONFIG_EDAC_DEBUG */ 102#endif /* CONFIG_EDAC_DEBUG */
@@ -246,21 +247,21 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
246 layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers); 247 layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
247 for (i = 0; i < n_layers; i++) { 248 for (i = 0; i < n_layers; i++) {
248 count *= layers[i].size; 249 count *= layers[i].size;
249 debugf4("errcount layer %d size %d\n", i, count); 250 edac_dbg(4, "errcount layer %d size %d\n", i, count);
250 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count); 251 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
251 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count); 252 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
252 tot_errcount += 2 * count; 253 tot_errcount += 2 * count;
253 } 254 }
254 255
255 debugf4("allocating %d error counters\n", tot_errcount); 256 edac_dbg(4, "allocating %d error counters\n", tot_errcount);
256 pvt = edac_align_ptr(&ptr, sz_pvt, 1); 257 pvt = edac_align_ptr(&ptr, sz_pvt, 1);
257 size = ((unsigned long)pvt) + sz_pvt; 258 size = ((unsigned long)pvt) + sz_pvt;
258 259
259 debugf1("allocating %u bytes for mci data (%d %s, %d csrows/channels)\n", 260 edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
260 size, 261 size,
261 tot_dimms, 262 tot_dimms,
262 per_rank ? "ranks" : "dimms", 263 per_rank ? "ranks" : "dimms",
263 tot_csrows * tot_channels); 264 tot_csrows * tot_channels);
264 265
265 mci = kzalloc(size, GFP_KERNEL); 266 mci = kzalloc(size, GFP_KERNEL);
266 if (mci == NULL) 267 if (mci == NULL)
@@ -326,8 +327,8 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
326 memset(&pos, 0, sizeof(pos)); 327 memset(&pos, 0, sizeof(pos));
327 row = 0; 328 row = 0;
328 chn = 0; 329 chn = 0;
329 debugf4("initializing %d %s\n", tot_dimms, 330 edac_dbg(4, "initializing %d %s\n",
330 per_rank ? "ranks" : "dimms"); 331 tot_dimms, per_rank ? "ranks" : "dimms");
331 for (i = 0; i < tot_dimms; i++) { 332 for (i = 0; i < tot_dimms; i++) {
332 chan = mci->csrows[row]->channels[chn]; 333 chan = mci->csrows[row]->channels[chn];
333 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]); 334 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
@@ -340,9 +341,9 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
340 mci->dimms[off] = dimm; 341 mci->dimms[off] = dimm;
341 dimm->mci = mci; 342 dimm->mci = mci;
342 343
343 debugf2("%d: %s%i (%d:%d:%d): row %d, chan %d\n", i, 344 edac_dbg(2, "%d: %s%i (%d:%d:%d): row %d, chan %d\n",
344 per_rank ? "rank" : "dimm", off, 345 i, per_rank ? "rank" : "dimm", off,
345 pos[0], pos[1], pos[2], row, chn); 346 pos[0], pos[1], pos[2], row, chn);
346 347
347 /* 348 /*
348 * Copy DIMM location and initialize it. 349 * Copy DIMM location and initialize it.
@@ -427,7 +428,7 @@ EXPORT_SYMBOL_GPL(edac_mc_alloc);
427 */ 428 */
428void edac_mc_free(struct mem_ctl_info *mci) 429void edac_mc_free(struct mem_ctl_info *mci)
429{ 430{
430 debugf1("\n"); 431 edac_dbg(1, "\n");
431 432
432 /* the mci instance is freed here, when the sysfs object is dropped */ 433 /* the mci instance is freed here, when the sysfs object is dropped */
433 edac_unregister_sysfs(mci); 434 edac_unregister_sysfs(mci);
@@ -447,7 +448,7 @@ struct mem_ctl_info *find_mci_by_dev(struct device *dev)
447 struct mem_ctl_info *mci; 448 struct mem_ctl_info *mci;
448 struct list_head *item; 449 struct list_head *item;
449 450
450 debugf3("\n"); 451 edac_dbg(3, "\n");
451 452
452 list_for_each(item, &mc_devices) { 453 list_for_each(item, &mc_devices) {
453 mci = list_entry(item, struct mem_ctl_info, link); 454 mci = list_entry(item, struct mem_ctl_info, link);
@@ -515,7 +516,7 @@ static void edac_mc_workq_function(struct work_struct *work_req)
515 */ 516 */
516static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec) 517static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
517{ 518{
518 debugf0("\n"); 519 edac_dbg(0, "\n");
519 520
520 /* if this instance is not in the POLL state, then simply return */ 521 /* if this instance is not in the POLL state, then simply return */
521 if (mci->op_state != OP_RUNNING_POLL) 522 if (mci->op_state != OP_RUNNING_POLL)
@@ -542,7 +543,7 @@ static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
542 543
543 status = cancel_delayed_work(&mci->work); 544 status = cancel_delayed_work(&mci->work);
544 if (status == 0) { 545 if (status == 0) {
545 debugf0("not canceled, flush the queue\n"); 546 edac_dbg(0, "not canceled, flush the queue\n");
546 547
547 /* workq instance might be running, wait for it */ 548 /* workq instance might be running, wait for it */
548 flush_workqueue(edac_workqueue); 549 flush_workqueue(edac_workqueue);
@@ -689,7 +690,7 @@ EXPORT_SYMBOL(edac_mc_find);
689/* FIXME - should a warning be printed if no error detection? correction? */ 690/* FIXME - should a warning be printed if no error detection? correction? */
690int edac_mc_add_mc(struct mem_ctl_info *mci) 691int edac_mc_add_mc(struct mem_ctl_info *mci)
691{ 692{
692 debugf0("\n"); 693 edac_dbg(0, "\n");
693 694
694#ifdef CONFIG_EDAC_DEBUG 695#ifdef CONFIG_EDAC_DEBUG
695 if (edac_debug_level >= 3) 696 if (edac_debug_level >= 3)
@@ -760,7 +761,7 @@ struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
760{ 761{
761 struct mem_ctl_info *mci; 762 struct mem_ctl_info *mci;
762 763
763 debugf0("\n"); 764 edac_dbg(0, "\n");
764 765
765 mutex_lock(&mem_ctls_mutex); 766 mutex_lock(&mem_ctls_mutex);
766 767
@@ -798,7 +799,7 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
798 void *virt_addr; 799 void *virt_addr;
799 unsigned long flags = 0; 800 unsigned long flags = 0;
800 801
801 debugf3("\n"); 802 edac_dbg(3, "\n");
802 803
803 /* ECC error page was not in our memory. Ignore it. */ 804 /* ECC error page was not in our memory. Ignore it. */
804 if (!pfn_valid(page)) 805 if (!pfn_valid(page))
@@ -828,7 +829,7 @@ int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
828 struct csrow_info **csrows = mci->csrows; 829 struct csrow_info **csrows = mci->csrows;
829 int row, i, j, n; 830 int row, i, j, n;
830 831
831 debugf1("MC%d: 0x%lx\n", mci->mc_idx, page); 832 edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
832 row = -1; 833 row = -1;
833 834
834 for (i = 0; i < mci->nr_csrows; i++) { 835 for (i = 0; i < mci->nr_csrows; i++) {
@@ -841,10 +842,10 @@ int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
841 if (n == 0) 842 if (n == 0)
842 continue; 843 continue;
843 844
844 debugf3("MC%d: first(0x%lx) page(0x%lx) last(0x%lx) " 845 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
845 "mask(0x%lx)\n", mci->mc_idx, 846 mci->mc_idx,
846 csrow->first_page, page, csrow->last_page, 847 csrow->first_page, page, csrow->last_page,
847 csrow->page_mask); 848 csrow->page_mask);
848 849
849 if ((page >= csrow->first_page) && 850 if ((page >= csrow->first_page) &&
850 (page <= csrow->last_page) && 851 (page <= csrow->last_page) &&
@@ -1048,7 +1049,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1048 u16 error_count; /* FIXME: make it a parameter */ 1049 u16 error_count; /* FIXME: make it a parameter */
1049 u8 grain_bits; 1050 u8 grain_bits;
1050 1051
1051 debugf3("MC%d\n", mci->mc_idx); 1052 edac_dbg(3, "MC%d\n", mci->mc_idx);
1052 1053
1053 /* 1054 /*
1054 * Check if the event report is consistent and if the memory 1055 * Check if the event report is consistent and if the memory
@@ -1126,10 +1127,9 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1126 * get csrow/channel of the DIMM, in order to allow 1127 * get csrow/channel of the DIMM, in order to allow
1127 * incrementing the compat API counters 1128 * incrementing the compat API counters
1128 */ 1129 */
1129 debugf4("%s csrows map: (%d,%d)\n", 1130 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1130 mci->mem_is_per_rank ? "rank" : "dimm", 1131 mci->mem_is_per_rank ? "rank" : "dimm",
1131 dimm->csrow, dimm->cschannel); 1132 dimm->csrow, dimm->cschannel);
1132
1133 if (row == -1) 1133 if (row == -1)
1134 row = dimm->csrow; 1134 row = dimm->csrow;
1135 else if (row >= 0 && row != dimm->csrow) 1135 else if (row >= 0 && row != dimm->csrow)
@@ -1145,8 +1145,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1145 if (!enable_per_layer_report) { 1145 if (!enable_per_layer_report) {
1146 strcpy(label, "any memory"); 1146 strcpy(label, "any memory");
1147 } else { 1147 } else {
1148 debugf4("csrow/channel to increment: (%d,%d)\n", 1148 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
1149 row, chan);
1150 if (p == label) 1149 if (p == label)
1151 strcpy(label, "unknown memory"); 1150 strcpy(label, "unknown memory");
1152 if (type == HW_EVENT_ERR_CORRECTED) { 1151 if (type == HW_EVENT_ERR_CORRECTED) {