diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-01-27 16:38:08 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-05-28 18:10:58 -0400 |
commit | 084a4fccef39ac7abb039511f32380f28d0b67e6 (patch) | |
tree | 0596612000c7ec3a848b10f7cc4acdb573218076 /drivers/edac/e752x_edac.c | |
parent | a7d7d2e1a07e3811dc49af2962c940fd8bbb6c8f (diff) |
edac: move dimm properties to struct dimm_info
On systems based on chip select rows, all channels need to use memories
with the same properties, otherwise the memories on channels A and B
won't be recognized.
However, such assumption is not true for all types of memory
controllers.
Controllers for FB-DIMM's don't have such requirements.
Also, modern Intel controllers seem to be capable of handling such
differences.
So, we need to get rid of storing the DIMM information into a per-csrow
data, storing it, instead at the right place.
The first step is to move grain, mtype, dtype and edac_mode to the
per-dimm struct.
Reviewed-by: Aristeu Rozanski <arozansk@redhat.com>
Reviewed-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: Mark Gross <mark.gross@intel.com>
Cc: Jason Uhlenkott <juhlenko@akamai.com>
Cc: Tim Small <tim@buttersideup.com>
Cc: Ranganathan Desikan <ravi@jetztechnologies.com>
Cc: "Arvind R." <arvino55@gmail.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Egor Martovetsky <egor@pasemi.com>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Joe Perches <joe@perches.com>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Hitoshi Mitake <h.mitake@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: James Bottomley <James.Bottomley@parallels.com>
Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Mike Williams <mike@mikebwilliams.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/e752x_edac.c')
-rw-r--r-- | drivers/edac/e752x_edac.c | 44 |
1 files changed, 24 insertions, 20 deletions
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index 41223261ede9..6cf6ec6bc71e 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c | |||
@@ -1044,7 +1044,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
1044 | int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ | 1044 | int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ |
1045 | int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ | 1045 | int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ |
1046 | u8 value; | 1046 | u8 value; |
1047 | u32 dra, drc, cumul_size; | 1047 | u32 dra, drc, cumul_size, i; |
1048 | 1048 | ||
1049 | dra = 0; | 1049 | dra = 0; |
1050 | for (index = 0; index < 4; index++) { | 1050 | for (index = 0; index < 4; index++) { |
@@ -1053,7 +1053,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
1053 | dra |= dra_reg << (index * 8); | 1053 | dra |= dra_reg << (index * 8); |
1054 | } | 1054 | } |
1055 | pci_read_config_dword(pdev, E752X_DRC, &drc); | 1055 | pci_read_config_dword(pdev, E752X_DRC, &drc); |
1056 | drc_chan = dual_channel_active(ddrcsr); | 1056 | drc_chan = dual_channel_active(ddrcsr) ? 1 : 0; |
1057 | drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */ | 1057 | drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */ |
1058 | drc_ddim = (drc >> 20) & 0x3; | 1058 | drc_ddim = (drc >> 20) & 0x3; |
1059 | 1059 | ||
@@ -1080,24 +1080,28 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
1080 | csrow->last_page = cumul_size - 1; | 1080 | csrow->last_page = cumul_size - 1; |
1081 | csrow->nr_pages = cumul_size - last_cumul_size; | 1081 | csrow->nr_pages = cumul_size - last_cumul_size; |
1082 | last_cumul_size = cumul_size; | 1082 | last_cumul_size = cumul_size; |
1083 | csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */ | 1083 | |
1084 | csrow->mtype = MEM_RDDR; /* only one type supported */ | 1084 | for (i = 0; i < drc_chan + 1; i++) { |
1085 | csrow->dtype = mem_dev ? DEV_X4 : DEV_X8; | 1085 | struct dimm_info *dimm = csrow->channels[i].dimm; |
1086 | 1086 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ | |
1087 | /* | 1087 | dimm->mtype = MEM_RDDR; /* only one type supported */ |
1088 | * if single channel or x8 devices then SECDED | 1088 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; |
1089 | * if dual channel and x4 then S4ECD4ED | 1089 | |
1090 | */ | 1090 | /* |
1091 | if (drc_ddim) { | 1091 | * if single channel or x8 devices then SECDED |
1092 | if (drc_chan && mem_dev) { | 1092 | * if dual channel and x4 then S4ECD4ED |
1093 | csrow->edac_mode = EDAC_S4ECD4ED; | 1093 | */ |
1094 | mci->edac_cap |= EDAC_FLAG_S4ECD4ED; | 1094 | if (drc_ddim) { |
1095 | } else { | 1095 | if (drc_chan && mem_dev) { |
1096 | csrow->edac_mode = EDAC_SECDED; | 1096 | dimm->edac_mode = EDAC_S4ECD4ED; |
1097 | mci->edac_cap |= EDAC_FLAG_SECDED; | 1097 | mci->edac_cap |= EDAC_FLAG_S4ECD4ED; |
1098 | } | 1098 | } else { |
1099 | } else | 1099 | dimm->edac_mode = EDAC_SECDED; |
1100 | csrow->edac_mode = EDAC_NONE; | 1100 | mci->edac_cap |= EDAC_FLAG_SECDED; |
1101 | } | ||
1102 | } else | ||
1103 | dimm->edac_mode = EDAC_NONE; | ||
1104 | } | ||
1101 | } | 1105 | } |
1102 | } | 1106 | } |
1103 | 1107 | ||