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authorMauro Carvalho Chehab <mchehab@redhat.com>2012-03-21 13:00:44 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-06-11 12:23:40 -0400
commitc56087595fb6531f359925b581529f1b2aef10f1 (patch)
tree6077edee64747d06759378ba634a738b401657d1 /drivers/edac/amd64_edac_inj.c
parentba004239e008a442bc327a57e227600fc1bd5ee7 (diff)
amd64_edac: convert sysfs logic to use struct device
Now that the EDAC core supports struct device, there's no sense on having any logic at the EDAC core to simulate it. So, instead of adding such logic there, change the logic at amd64_edac to use it. Reviewed-by: Aristeu Rozanski <arozansk@redhat.com> Cc: Doug Thompson <norsk5@yahoo.com> Cc: Borislav Petkov <borislav.petkov@amd.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/edac/amd64_edac_inj.c')
-rw-r--r--drivers/edac/amd64_edac_inj.c128
1 files changed, 74 insertions, 54 deletions
diff --git a/drivers/edac/amd64_edac_inj.c b/drivers/edac/amd64_edac_inj.c
index 303f10e03dda..ef1ff4ea9576 100644
--- a/drivers/edac/amd64_edac_inj.c
+++ b/drivers/edac/amd64_edac_inj.c
@@ -1,7 +1,10 @@
1#include "amd64_edac.h" 1#include "amd64_edac.h"
2 2
3static ssize_t amd64_inject_section_show(struct mem_ctl_info *mci, char *buf) 3static ssize_t amd64_inject_section_show(struct device *dev,
4 struct device_attribute *mattr,
5 char *buf)
4{ 6{
7 struct mem_ctl_info *mci = to_mci(dev);
5 struct amd64_pvt *pvt = mci->pvt_info; 8 struct amd64_pvt *pvt = mci->pvt_info;
6 return sprintf(buf, "0x%x\n", pvt->injection.section); 9 return sprintf(buf, "0x%x\n", pvt->injection.section);
7} 10}
@@ -12,9 +15,11 @@ static ssize_t amd64_inject_section_show(struct mem_ctl_info *mci, char *buf)
12 * 15 *
13 * range: 0..3 16 * range: 0..3
14 */ 17 */
15static ssize_t amd64_inject_section_store(struct mem_ctl_info *mci, 18static ssize_t amd64_inject_section_store(struct device *dev,
19 struct device_attribute *mattr,
16 const char *data, size_t count) 20 const char *data, size_t count)
17{ 21{
22 struct mem_ctl_info *mci = to_mci(dev);
18 struct amd64_pvt *pvt = mci->pvt_info; 23 struct amd64_pvt *pvt = mci->pvt_info;
19 unsigned long value; 24 unsigned long value;
20 int ret = 0; 25 int ret = 0;
@@ -33,8 +38,11 @@ static ssize_t amd64_inject_section_store(struct mem_ctl_info *mci,
33 return ret; 38 return ret;
34} 39}
35 40
36static ssize_t amd64_inject_word_show(struct mem_ctl_info *mci, char *buf) 41static ssize_t amd64_inject_word_show(struct device *dev,
42 struct device_attribute *mattr,
43 char *buf)
37{ 44{
45 struct mem_ctl_info *mci = to_mci(dev);
38 struct amd64_pvt *pvt = mci->pvt_info; 46 struct amd64_pvt *pvt = mci->pvt_info;
39 return sprintf(buf, "0x%x\n", pvt->injection.word); 47 return sprintf(buf, "0x%x\n", pvt->injection.word);
40} 48}
@@ -45,9 +53,11 @@ static ssize_t amd64_inject_word_show(struct mem_ctl_info *mci, char *buf)
45 * 53 *
46 * range: 0..8 54 * range: 0..8
47 */ 55 */
48static ssize_t amd64_inject_word_store(struct mem_ctl_info *mci, 56static ssize_t amd64_inject_word_store(struct device *dev,
49 const char *data, size_t count) 57 struct device_attribute *mattr,
58 const char *data, size_t count)
50{ 59{
60 struct mem_ctl_info *mci = to_mci(dev);
51 struct amd64_pvt *pvt = mci->pvt_info; 61 struct amd64_pvt *pvt = mci->pvt_info;
52 unsigned long value; 62 unsigned long value;
53 int ret = 0; 63 int ret = 0;
@@ -66,8 +76,11 @@ static ssize_t amd64_inject_word_store(struct mem_ctl_info *mci,
66 return ret; 76 return ret;
67} 77}
68 78
69static ssize_t amd64_inject_ecc_vector_show(struct mem_ctl_info *mci, char *buf) 79static ssize_t amd64_inject_ecc_vector_show(struct device *dev,
80 struct device_attribute *mattr,
81 char *buf)
70{ 82{
83 struct mem_ctl_info *mci = to_mci(dev);
71 struct amd64_pvt *pvt = mci->pvt_info; 84 struct amd64_pvt *pvt = mci->pvt_info;
72 return sprintf(buf, "0x%x\n", pvt->injection.bit_map); 85 return sprintf(buf, "0x%x\n", pvt->injection.bit_map);
73} 86}
@@ -77,9 +90,11 @@ static ssize_t amd64_inject_ecc_vector_show(struct mem_ctl_info *mci, char *buf)
77 * corresponding bit within the error injection word above. When used during a 90 * corresponding bit within the error injection word above. When used during a
78 * DRAM ECC read, it holds the contents of the of the DRAM ECC bits. 91 * DRAM ECC read, it holds the contents of the of the DRAM ECC bits.
79 */ 92 */
80static ssize_t amd64_inject_ecc_vector_store(struct mem_ctl_info *mci, 93static ssize_t amd64_inject_ecc_vector_store(struct device *dev,
81 const char *data, size_t count) 94 struct device_attribute *mattr,
95 const char *data, size_t count)
82{ 96{
97 struct mem_ctl_info *mci = to_mci(dev);
83 struct amd64_pvt *pvt = mci->pvt_info; 98 struct amd64_pvt *pvt = mci->pvt_info;
84 unsigned long value; 99 unsigned long value;
85 int ret = 0; 100 int ret = 0;
@@ -103,9 +118,11 @@ static ssize_t amd64_inject_ecc_vector_store(struct mem_ctl_info *mci,
103 * Do a DRAM ECC read. Assemble staged values in the pvt area, format into 118 * Do a DRAM ECC read. Assemble staged values in the pvt area, format into
104 * fields needed by the injection registers and read the NB Array Data Port. 119 * fields needed by the injection registers and read the NB Array Data Port.
105 */ 120 */
106static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci, 121static ssize_t amd64_inject_read_store(struct device *dev,
107 const char *data, size_t count) 122 struct device_attribute *mattr,
123 const char *data, size_t count)
108{ 124{
125 struct mem_ctl_info *mci = to_mci(dev);
109 struct amd64_pvt *pvt = mci->pvt_info; 126 struct amd64_pvt *pvt = mci->pvt_info;
110 unsigned long value; 127 unsigned long value;
111 u32 section, word_bits; 128 u32 section, word_bits;
@@ -136,9 +153,11 @@ static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci,
136 * Do a DRAM ECC write. Assemble staged values in the pvt area and format into 153 * Do a DRAM ECC write. Assemble staged values in the pvt area and format into
137 * fields needed by the injection registers. 154 * fields needed by the injection registers.
138 */ 155 */
139static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci, 156static ssize_t amd64_inject_write_store(struct device *dev,
157 struct device_attribute *mattr,
140 const char *data, size_t count) 158 const char *data, size_t count)
141{ 159{
160 struct mem_ctl_info *mci = to_mci(dev);
142 struct amd64_pvt *pvt = mci->pvt_info; 161 struct amd64_pvt *pvt = mci->pvt_info;
143 unsigned long value; 162 unsigned long value;
144 u32 section, word_bits; 163 u32 section, word_bits;
@@ -168,46 +187,47 @@ static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci,
168/* 187/*
169 * update NUM_INJ_ATTRS in case you add new members 188 * update NUM_INJ_ATTRS in case you add new members
170 */ 189 */
171struct mcidev_sysfs_attribute amd64_inj_attrs[] = { 190
172 191static DEVICE_ATTR(inject_section, S_IRUGO | S_IWUSR,
173 { 192 amd64_inject_section_show, amd64_inject_section_store);
174 .attr = { 193static DEVICE_ATTR(inject_word, S_IRUGO | S_IWUSR,
175 .name = "inject_section", 194 amd64_inject_word_show, amd64_inject_word_store);
176 .mode = (S_IRUGO | S_IWUSR) 195static DEVICE_ATTR(inject_ecc_vector, S_IRUGO | S_IWUSR,
177 }, 196 amd64_inject_ecc_vector_show, amd64_inject_ecc_vector_store);
178 .show = amd64_inject_section_show, 197static DEVICE_ATTR(inject_write, S_IRUGO | S_IWUSR,
179 .store = amd64_inject_section_store, 198 NULL, amd64_inject_write_store);
180 }, 199static DEVICE_ATTR(inject_read, S_IRUGO | S_IWUSR,
181 { 200 NULL, amd64_inject_read_store);
182 .attr = { 201
183 .name = "inject_word", 202
184 .mode = (S_IRUGO | S_IWUSR) 203int amd64_create_sysfs_inject_files(struct mem_ctl_info *mci)
185 }, 204{
186 .show = amd64_inject_word_show, 205 int rc;
187 .store = amd64_inject_word_store, 206
188 }, 207 rc = device_create_file(&mci->dev, &dev_attr_inject_section);
189 { 208 if (rc < 0)
190 .attr = { 209 return rc;
191 .name = "inject_ecc_vector", 210 rc = device_create_file(&mci->dev, &dev_attr_inject_word);
192 .mode = (S_IRUGO | S_IWUSR) 211 if (rc < 0)
193 }, 212 return rc;
194 .show = amd64_inject_ecc_vector_show, 213 rc = device_create_file(&mci->dev, &dev_attr_inject_ecc_vector);
195 .store = amd64_inject_ecc_vector_store, 214 if (rc < 0)
196 }, 215 return rc;
197 { 216 rc = device_create_file(&mci->dev, &dev_attr_inject_write);
198 .attr = { 217 if (rc < 0)
199 .name = "inject_write", 218 return rc;
200 .mode = (S_IRUGO | S_IWUSR) 219 rc = device_create_file(&mci->dev, &dev_attr_inject_read);
201 }, 220 if (rc < 0)
202 .show = NULL, 221 return rc;
203 .store = amd64_inject_write_store, 222
204 }, 223 return 0;
205 { 224}
206 .attr = { 225
207 .name = "inject_read", 226void amd64_remove_sysfs_inject_files(struct mem_ctl_info *mci)
208 .mode = (S_IRUGO | S_IWUSR) 227{
209 }, 228 device_remove_file(&mci->dev, &dev_attr_inject_section);
210 .show = NULL, 229 device_remove_file(&mci->dev, &dev_attr_inject_word);
211 .store = amd64_inject_read_store, 230 device_remove_file(&mci->dev, &dev_attr_inject_ecc_vector);
212 }, 231 device_remove_file(&mci->dev, &dev_attr_inject_write);
213}; 232 device_remove_file(&mci->dev, &dev_attr_inject_read);
233}