Merge commit 'renesas-shdma-for-v3.17' into for-linus

2 files changed, 9 insertions, 10 deletions

diff --git a/drivers/dma/sh/shdma-arm.h b/drivers/dma/sh/shdma-arm.h
index a2b8258426c9..a1b0ef45d6a2 100644
--- a/drivers/dma/sh/shdma-arm.h
+++ b/drivers/dma/sh/shdma-arm.h
@@ -45,7 +45,7 @@ enum {
         ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
          (((i) & TS_HI_BIT)  << TS_HI_SHIFT))
 
-#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz)))
-#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz)))
+#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz)))
+#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))
 
 #endif
diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
index 146d5df926db..58eb85770eba 100644
--- a/drivers/dma/sh/shdmac.c
+++ b/drivers/dma/sh/shdmac.c
@@ -38,12 +38,12 @@
 #include "../dmaengine.h"
 #include "shdma.h"
 
-/* DMA register */
-#define SAR     0x00
-#define DAR     0x04
-#define TCR     0x08
-#define CHCR    0x0C
-#define DMAOR   0x40
+/* DMA registers */
+#define SAR     0x00    /* Source Address Register */
+#define DAR     0x04    /* Destination Address Register */
+#define TCR     0x08    /* Transfer Count Register */
+#define CHCR    0x0C    /* Channel Control Register */
+#define DMAOR   0x40    /* DMA Operation Register */
 
 #define TEND    0x18 /* USB-DMAC */
 
@@ -239,9 +239,8 @@ static void dmae_init(struct sh_dmae_chan *sh_chan)
 {
         /*
          * Default configuration for dual address memory-memory transfer.
-         * 0x400 represents auto-request.
          */
-        u32 chcr = DM_INC | SM_INC | 0x400 | log2size_to_chcr(sh_chan,
+        u32 chcr = DM_INC | SM_INC | RS_AUTO | log2size_to_chcr(sh_chan,
                                                    LOG2_DEFAULT_XFER_SIZE);
         sh_chan->xmit_shift = calc_xmit_shift(sh_chan, chcr);
         chcr_write(sh_chan, chcr);