diff options
author | Yong Wang <yong.y.wang@intel.com> | 2010-10-04 06:37:02 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2010-10-07 18:03:43 -0400 |
commit | b306df5e925bb584b2157f11f97c5eb20a13de4d (patch) | |
tree | 10cf5276a242c69a57c73f53499ab049827ed0a1 /drivers/dma | |
parent | 53a61badf47e674fb43d73cd22f0f8065098ddf6 (diff) |
intel_mid_dma: Allow IRQ sharing
intel_mid_dma driver allows interrupt sharing. Thus it needs
to check whether IRQ source is the DMA controller and return
the appropriate IRQ return.
Signed-off-by: Yong Wang <yong.y.wang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r-- | drivers/dma/intel_mid_dma.c | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c index 373396c462a0..c4b81387f0c6 100644 --- a/drivers/dma/intel_mid_dma.c +++ b/drivers/dma/intel_mid_dma.c | |||
@@ -817,9 +817,14 @@ static void dma_tasklet2(unsigned long data) | |||
817 | static irqreturn_t intel_mid_dma_interrupt(int irq, void *data) | 817 | static irqreturn_t intel_mid_dma_interrupt(int irq, void *data) |
818 | { | 818 | { |
819 | struct middma_device *mid = data; | 819 | struct middma_device *mid = data; |
820 | u32 status; | 820 | u32 tfr_status, err_status; |
821 | int call_tasklet = 0; | 821 | int call_tasklet = 0; |
822 | 822 | ||
823 | tfr_status = ioread32(mid->dma_base + RAW_TFR); | ||
824 | err_status = ioread32(mid->dma_base + RAW_ERR); | ||
825 | if (!tfr_status && !err_status) | ||
826 | return IRQ_NONE; | ||
827 | |||
823 | /*DMA Interrupt*/ | 828 | /*DMA Interrupt*/ |
824 | pr_debug("MDMA:Got an interrupt on irq %d\n", irq); | 829 | pr_debug("MDMA:Got an interrupt on irq %d\n", irq); |
825 | if (!mid) { | 830 | if (!mid) { |
@@ -827,19 +832,17 @@ static irqreturn_t intel_mid_dma_interrupt(int irq, void *data) | |||
827 | return -EINVAL; | 832 | return -EINVAL; |
828 | } | 833 | } |
829 | 834 | ||
830 | status = ioread32(mid->dma_base + RAW_TFR); | 835 | pr_debug("MDMA: Status %x, Mask %x\n", tfr_status, mid->intr_mask); |
831 | pr_debug("MDMA: Status %x, Mask %x\n", status, mid->intr_mask); | 836 | tfr_status &= mid->intr_mask; |
832 | status &= mid->intr_mask; | 837 | if (tfr_status) { |
833 | if (status) { | ||
834 | /*need to disable intr*/ | 838 | /*need to disable intr*/ |
835 | iowrite32((status << 8), mid->dma_base + MASK_TFR); | 839 | iowrite32((tfr_status << 8), mid->dma_base + MASK_TFR); |
836 | pr_debug("MDMA: Calling tasklet %x\n", status); | 840 | pr_debug("MDMA: Calling tasklet %x\n", tfr_status); |
837 | call_tasklet = 1; | 841 | call_tasklet = 1; |
838 | } | 842 | } |
839 | status = ioread32(mid->dma_base + RAW_ERR); | 843 | err_status &= mid->intr_mask; |
840 | status &= mid->intr_mask; | 844 | if (err_status) { |
841 | if (status) { | 845 | iowrite32(MASK_INTR_REG(err_status), mid->dma_base + MASK_ERR); |
842 | iowrite32(MASK_INTR_REG(status), mid->dma_base + MASK_ERR); | ||
843 | call_tasklet = 1; | 846 | call_tasklet = 1; |
844 | } | 847 | } |
845 | if (call_tasklet) | 848 | if (call_tasklet) |