diff options
| author | Linus Walleij <linus.walleij@stericsson.com> | 2010-03-26 19:50:49 -0400 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2010-03-26 19:50:49 -0400 |
| commit | 0793448187643b50af89d36b08470baf45a3cab4 (patch) | |
| tree | b3313ff58d47e26a8cf707d196177effa1aadfbe /drivers/dma/ppc4xx | |
| parent | c3635c78e500a52c9fcd55de381a72928d9e054d (diff) | |
DMAENGINE: generic channel status v2
Convert the device_is_tx_complete() operation on the
DMA engine to a generic device_tx_status()operation which
can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE,
DMA_TX_PAUSED.
[dan.j.williams@intel.com: update for timberdale]
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Maciej Sosnowski <maciej.sosnowski@intel.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Li Yang <leoli@freescale.com>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Magnus Damm <damm@opensource.se>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Joe Perches <joe@perches.com>
Cc: Roland Dreier <rdreier@cisco.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ppc4xx')
| -rw-r--r-- | drivers/dma/ppc4xx/adma.c | 27 |
1 files changed, 15 insertions, 12 deletions
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c index e69d87f24a25..d9a54c018652 100644 --- a/drivers/dma/ppc4xx/adma.c +++ b/drivers/dma/ppc4xx/adma.c | |||
| @@ -3934,12 +3934,13 @@ static void ppc440spe_adma_free_chan_resources(struct dma_chan *chan) | |||
| 3934 | } | 3934 | } |
| 3935 | 3935 | ||
| 3936 | /** | 3936 | /** |
| 3937 | * ppc440spe_adma_is_complete - poll the status of an ADMA transaction | 3937 | * ppc440spe_adma_tx_status - poll the status of an ADMA transaction |
| 3938 | * @chan: ADMA channel handle | 3938 | * @chan: ADMA channel handle |
| 3939 | * @cookie: ADMA transaction identifier | 3939 | * @cookie: ADMA transaction identifier |
| 3940 | * @txstate: a holder for the current state of the channel | ||
| 3940 | */ | 3941 | */ |
| 3941 | static enum dma_status ppc440spe_adma_is_complete(struct dma_chan *chan, | 3942 | static enum dma_status ppc440spe_adma_tx_status(struct dma_chan *chan, |
| 3942 | dma_cookie_t cookie, dma_cookie_t *done, dma_cookie_t *used) | 3943 | dma_cookie_t cookie, struct dma_tx_state *txstate) |
| 3943 | { | 3944 | { |
| 3944 | struct ppc440spe_adma_chan *ppc440spe_chan; | 3945 | struct ppc440spe_adma_chan *ppc440spe_chan; |
| 3945 | dma_cookie_t last_used; | 3946 | dma_cookie_t last_used; |
| @@ -3950,10 +3951,11 @@ static enum dma_status ppc440spe_adma_is_complete(struct dma_chan *chan, | |||
| 3950 | last_used = chan->cookie; | 3951 | last_used = chan->cookie; |
| 3951 | last_complete = ppc440spe_chan->completed_cookie; | 3952 | last_complete = ppc440spe_chan->completed_cookie; |
| 3952 | 3953 | ||
| 3953 | if (done) | 3954 | if (txstate) { |
| 3954 | *done = last_complete; | 3955 | txstate->last = last_complete; |
| 3955 | if (used) | 3956 | txstate->used = last_used; |
| 3956 | *used = last_used; | 3957 | txstate->residue = 0; |
| 3958 | } | ||
| 3957 | 3959 | ||
| 3958 | ret = dma_async_is_complete(cookie, last_complete, last_used); | 3960 | ret = dma_async_is_complete(cookie, last_complete, last_used); |
| 3959 | if (ret == DMA_SUCCESS) | 3961 | if (ret == DMA_SUCCESS) |
| @@ -3964,10 +3966,11 @@ static enum dma_status ppc440spe_adma_is_complete(struct dma_chan *chan, | |||
| 3964 | last_used = chan->cookie; | 3966 | last_used = chan->cookie; |
| 3965 | last_complete = ppc440spe_chan->completed_cookie; | 3967 | last_complete = ppc440spe_chan->completed_cookie; |
| 3966 | 3968 | ||
| 3967 | if (done) | 3969 | if (txstate) { |
| 3968 | *done = last_complete; | 3970 | txstate->last = last_complete; |
| 3969 | if (used) | 3971 | txstate->used = last_used; |
| 3970 | *used = last_used; | 3972 | txstate->residue = 0; |
| 3973 | } | ||
| 3971 | 3974 | ||
| 3972 | return dma_async_is_complete(cookie, last_complete, last_used); | 3975 | return dma_async_is_complete(cookie, last_complete, last_used); |
| 3973 | } | 3976 | } |
| @@ -4179,7 +4182,7 @@ static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev) | |||
| 4179 | ppc440spe_adma_alloc_chan_resources; | 4182 | ppc440spe_adma_alloc_chan_resources; |
| 4180 | adev->common.device_free_chan_resources = | 4183 | adev->common.device_free_chan_resources = |
| 4181 | ppc440spe_adma_free_chan_resources; | 4184 | ppc440spe_adma_free_chan_resources; |
| 4182 | adev->common.device_is_tx_complete = ppc440spe_adma_is_complete; | 4185 | adev->common.device_tx_status = ppc440spe_adma_tx_status; |
| 4183 | adev->common.device_issue_pending = ppc440spe_adma_issue_pending; | 4186 | adev->common.device_issue_pending = ppc440spe_adma_issue_pending; |
| 4184 | 4187 | ||
| 4185 | /* Set prep routines based on capability */ | 4188 | /* Set prep routines based on capability */ |
