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authorDan Williams <dan.j.williams@intel.com>2009-11-19 19:08:45 -0500
committerDan Williams <dan.j.williams@intel.com>2009-11-19 19:08:45 -0500
commitde581b65f6fe78168affa552c3bd15b8c80ed614 (patch)
treeb980e64cf31ad79c489838310be2e13e626dd05c /drivers/dma/ioat
parent6f82b83b7a56bc6e9dd6d7b93531dde6027c5309 (diff)
ioat3: specify valid address for disabled-Q or disabled-P
Although disabled, hardware still checks address validity, so duplicate the known address. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat')
-rw-r--r--drivers/dma/ioat/dma_v3.c22
1 files changed, 17 insertions, 5 deletions
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index 4f305f61f878..fad2e9fba490 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -736,10 +736,16 @@ ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
736 unsigned int src_cnt, const unsigned char *scf, size_t len, 736 unsigned int src_cnt, const unsigned char *scf, size_t len,
737 unsigned long flags) 737 unsigned long flags)
738{ 738{
739 /* specify valid address for disabled result */
740 if (flags & DMA_PREP_PQ_DISABLE_P)
741 dst[0] = dst[1];
742 if (flags & DMA_PREP_PQ_DISABLE_Q)
743 dst[1] = dst[0];
744
739 /* handle the single source multiply case from the raid6 745 /* handle the single source multiply case from the raid6
740 * recovery path 746 * recovery path
741 */ 747 */
742 if (unlikely((flags & DMA_PREP_PQ_DISABLE_P) && src_cnt == 1)) { 748 if ((flags & DMA_PREP_PQ_DISABLE_P) && src_cnt == 1) {
743 dma_addr_t single_source[2]; 749 dma_addr_t single_source[2];
744 unsigned char single_source_coef[2]; 750 unsigned char single_source_coef[2];
745 751
@@ -761,6 +767,12 @@ ioat3_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
761 unsigned int src_cnt, const unsigned char *scf, size_t len, 767 unsigned int src_cnt, const unsigned char *scf, size_t len,
762 enum sum_check_flags *pqres, unsigned long flags) 768 enum sum_check_flags *pqres, unsigned long flags)
763{ 769{
770 /* specify valid address for disabled result */
771 if (flags & DMA_PREP_PQ_DISABLE_P)
772 pq[0] = pq[1];
773 if (flags & DMA_PREP_PQ_DISABLE_Q)
774 pq[1] = pq[0];
775
764 /* the cleanup routine only sets bits on validate failure, it 776 /* the cleanup routine only sets bits on validate failure, it
765 * does not clear bits on validate success... so clear it here 777 * does not clear bits on validate success... so clear it here
766 */ 778 */
@@ -778,9 +790,9 @@ ioat3_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
778 dma_addr_t pq[2]; 790 dma_addr_t pq[2];
779 791
780 memset(scf, 0, src_cnt); 792 memset(scf, 0, src_cnt);
781 flags |= DMA_PREP_PQ_DISABLE_Q;
782 pq[0] = dst; 793 pq[0] = dst;
783 pq[1] = ~0; 794 flags |= DMA_PREP_PQ_DISABLE_Q;
795 pq[1] = dst; /* specify valid address for disabled result */
784 796
785 return __ioat3_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len, 797 return __ioat3_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len,
786 flags); 798 flags);
@@ -800,9 +812,9 @@ ioat3_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
800 *result = 0; 812 *result = 0;
801 813
802 memset(scf, 0, src_cnt); 814 memset(scf, 0, src_cnt);
803 flags |= DMA_PREP_PQ_DISABLE_Q;
804 pq[0] = src[0]; 815 pq[0] = src[0];
805 pq[1] = ~0; 816 flags |= DMA_PREP_PQ_DISABLE_Q;
817 pq[1] = pq[0]; /* specify valid address for disabled result */
806 818
807 return __ioat3_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1, scf, 819 return __ioat3_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1, scf,
808 len, flags); 820 len, flags);