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authorDave Jiang <dave.jiang@intel.com>2013-03-26 18:42:59 -0400
committerVinod Koul <vinod.koul@intel.com>2013-04-15 00:21:20 -0400
commit6ead7e484957f2ae9bf2085688518d95ce75ab80 (patch)
treea8d17abfc10507965f5b7555c169f8e4927a717d /drivers/dma/ioat
parent8a52b9ff1154a68b6a2a8da9a31a87e52f5f6418 (diff)
ioatdma: skip legacy reset bits since v3.3 plattform doesn't need it
Make it so only 3.2 and earlier platform need the PCI config register clearings since this implementation does not have the registers. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Acked-by: Dan Williams <djbw@fb.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/ioat')
-rw-r--r--drivers/dma/ioat/dma_v3.c34
1 files changed, 21 insertions, 13 deletions
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index 65b912aa1012..804522c1300a 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -1331,20 +1331,28 @@ static int ioat3_reset_hw(struct ioat_chan_common *chan)
1331 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); 1331 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);
1332 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET); 1332 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);
1333 1333
1334 /* clear any pending errors */ 1334 if (device->version < IOAT_VER_3_3) {
1335 err = pci_read_config_dword(pdev, IOAT_PCI_CHANERR_INT_OFFSET, &chanerr); 1335 /* clear any pending errors */
1336 if (err) { 1336 err = pci_read_config_dword(pdev,
1337 dev_err(&pdev->dev, "channel error register unreachable\n"); 1337 IOAT_PCI_CHANERR_INT_OFFSET, &chanerr);
1338 return err; 1338 if (err) {
1339 } 1339 dev_err(&pdev->dev,
1340 pci_write_config_dword(pdev, IOAT_PCI_CHANERR_INT_OFFSET, chanerr); 1340 "channel error register unreachable\n");
1341 return err;
1342 }
1343 pci_write_config_dword(pdev,
1344 IOAT_PCI_CHANERR_INT_OFFSET, chanerr);
1341 1345
1342 /* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit 1346 /* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit
1343 * (workaround for spurious config parity error after restart) 1347 * (workaround for spurious config parity error after restart)
1344 */ 1348 */
1345 pci_read_config_word(pdev, IOAT_PCI_DEVICE_ID_OFFSET, &dev_id); 1349 pci_read_config_word(pdev, IOAT_PCI_DEVICE_ID_OFFSET, &dev_id);
1346 if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0) 1350 if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0) {
1347 pci_write_config_dword(pdev, IOAT_PCI_DMAUNCERRSTS_OFFSET, 0x10); 1351 pci_write_config_dword(pdev,
1352 IOAT_PCI_DMAUNCERRSTS_OFFSET,
1353 0x10);
1354 }
1355 }
1348 1356
1349 err = ioat2_reset_sync(chan, msecs_to_jiffies(200)); 1357 err = ioat2_reset_sync(chan, msecs_to_jiffies(200));
1350 if (err) { 1358 if (err) {