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authorDan Williams <dan.j.williams@intel.com>2009-09-08 15:02:01 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:38:54 -0400
commita309218acee8606f7e235da20cc826eb06d9b0f6 (patch)
treeabf2cc9830b6a5a52a165e6a736e85cd5d7b36c0 /drivers/dma/ioat/dma.h
parent09c8a5b85e5f1e74a19bdd7c85547429d51df1cd (diff)
ioat2,3: dynamically resize descriptor ring
Increment the allocation order of the descriptor ring every time we run out of descriptors up to a maximum of allocation order specified by the module parameter 'ioat_max_alloc_order'. After each idle period decrement the allocation order to a minimum order of 'ioat_ring_alloc_order' (i.e. the default ring size, tunable as a module parameter). Signed-off-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat/dma.h')
-rw-r--r--drivers/dma/ioat/dma.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index dbfccac3e80c..d9d6a7e3cd76 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -88,6 +88,7 @@ struct ioat_chan_common {
88 #define IOAT_RESET_PENDING 2 88 #define IOAT_RESET_PENDING 2
89 struct timer_list timer; 89 struct timer_list timer;
90 #define COMPLETION_TIMEOUT msecs_to_jiffies(100) 90 #define COMPLETION_TIMEOUT msecs_to_jiffies(100)
91 #define IDLE_TIMEOUT msecs_to_jiffies(2000)
91 #define RESET_DELAY msecs_to_jiffies(100) 92 #define RESET_DELAY msecs_to_jiffies(100)
92 struct ioatdma_device *device; 93 struct ioatdma_device *device;
93 dma_addr_t completion_dma; 94 dma_addr_t completion_dma;