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authorLinus Walleij <linus.walleij@linaro.org>2013-09-09 03:35:54 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2013-09-13 07:43:53 -0400
commitf5b38c5f19b1dafb413c6581cd4a0d84d3b6512f (patch)
tree6ed73974a4a8cec70834be01514c8af2852dfaf4 /drivers/crypto
parenta44bc80e66b4014e462cb8be9d354a7bc4723b7e (diff)
crypto: tegra - use kernel entropy instead of ad-hoc
The way I read the Tegra AES RNG is that it has a homebrew algorithm for initializing the 128bit RNG using timespec and the unique chip ID. This looks like reinventing the (square) wheel, instead just grab 128bits from the kernel entropy pool where the time and (after another patch) chip unique ID is already mixed in. Incidentally this also gets rid of a rather ugly cross-dependence on the machine using an extern declaration. Cc: Varun Wadekar <vwadekar@nvidia.com> Cc: Neil Horman <nhorman@tuxdriver.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r--drivers/crypto/tegra-aes.c15
1 files changed, 3 insertions, 12 deletions
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c
index 2d58da972ae2..7f42bfe9fc81 100644
--- a/drivers/crypto/tegra-aes.c
+++ b/drivers/crypto/tegra-aes.c
@@ -199,8 +199,6 @@ static void aes_workqueue_handler(struct work_struct *work);
199static DECLARE_WORK(aes_work, aes_workqueue_handler); 199static DECLARE_WORK(aes_work, aes_workqueue_handler);
200static struct workqueue_struct *aes_wq; 200static struct workqueue_struct *aes_wq;
201 201
202extern unsigned long long tegra_chip_uid(void);
203
204static inline u32 aes_readl(struct tegra_aes_dev *dd, u32 offset) 202static inline u32 aes_readl(struct tegra_aes_dev *dd, u32 offset)
205{ 203{
206 return readl(dd->io_base + offset); 204 return readl(dd->io_base + offset);
@@ -713,9 +711,8 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
713 struct tegra_aes_dev *dd = aes_dev; 711 struct tegra_aes_dev *dd = aes_dev;
714 struct tegra_aes_ctx *ctx = &rng_ctx; 712 struct tegra_aes_ctx *ctx = &rng_ctx;
715 struct tegra_aes_slot *key_slot; 713 struct tegra_aes_slot *key_slot;
716 struct timespec ts;
717 int ret = 0; 714 int ret = 0;
718 u64 nsec, tmp[2]; 715 u8 tmp[16]; /* 16 bytes = 128 bits of entropy */
719 u8 *dt; 716 u8 *dt;
720 717
721 if (!ctx || !dd) { 718 if (!ctx || !dd) {
@@ -778,14 +775,8 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
778 if (dd->ivlen >= (2 * DEFAULT_RNG_BLK_SZ + AES_KEYSIZE_128)) { 775 if (dd->ivlen >= (2 * DEFAULT_RNG_BLK_SZ + AES_KEYSIZE_128)) {
779 dt = dd->iv + DEFAULT_RNG_BLK_SZ + AES_KEYSIZE_128; 776 dt = dd->iv + DEFAULT_RNG_BLK_SZ + AES_KEYSIZE_128;
780 } else { 777 } else {
781 getnstimeofday(&ts); 778 get_random_bytes(tmp, sizeof(tmp));
782 nsec = timespec_to_ns(&ts); 779 dt = tmp;
783 do_div(nsec, 1000);
784 nsec ^= dd->ctr << 56;
785 dd->ctr++;
786 tmp[0] = nsec;
787 tmp[1] = tegra_chip_uid();
788 dt = (u8 *)tmp;
789 } 780 }
790 memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ); 781 memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ);
791 782