diff options
author | Phil Sutter <phil.sutter@viprinet.com> | 2011-05-05 09:29:01 -0400 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2011-05-11 01:06:17 -0400 |
commit | 7a1c6bcf269203485d716d8e3bec6671dabb5067 (patch) | |
tree | 016473ab584401454962371f5b623b541403ce14 /drivers/crypto | |
parent | 2a025f5dfcfaf7348fff6bda3ea007144f7eb47c (diff) |
crypto: mv_cesa - no need to save digest state after the last chunk
Signed-off-by: Phil Sutter <phil.sutter@viprinet.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/mv_cesa.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c index c018cd0ac13b..fb3f1e35623d 100644 --- a/drivers/crypto/mv_cesa.c +++ b/drivers/crypto/mv_cesa.c | |||
@@ -407,12 +407,6 @@ static void mv_hash_algo_completion(void) | |||
407 | copy_src_to_buf(&cpg->p, ctx->buffer, ctx->extra_bytes); | 407 | copy_src_to_buf(&cpg->p, ctx->buffer, ctx->extra_bytes); |
408 | sg_miter_stop(&cpg->p.src_sg_it); | 408 | sg_miter_stop(&cpg->p.src_sg_it); |
409 | 409 | ||
410 | ctx->state[0] = readl(cpg->reg + DIGEST_INITIAL_VAL_A); | ||
411 | ctx->state[1] = readl(cpg->reg + DIGEST_INITIAL_VAL_B); | ||
412 | ctx->state[2] = readl(cpg->reg + DIGEST_INITIAL_VAL_C); | ||
413 | ctx->state[3] = readl(cpg->reg + DIGEST_INITIAL_VAL_D); | ||
414 | ctx->state[4] = readl(cpg->reg + DIGEST_INITIAL_VAL_E); | ||
415 | |||
416 | if (likely(ctx->last_chunk)) { | 410 | if (likely(ctx->last_chunk)) { |
417 | if (likely(ctx->count <= MAX_HW_HASH_SIZE)) { | 411 | if (likely(ctx->count <= MAX_HW_HASH_SIZE)) { |
418 | memcpy(req->result, cpg->sram + SRAM_DIGEST_BUF, | 412 | memcpy(req->result, cpg->sram + SRAM_DIGEST_BUF, |
@@ -420,6 +414,12 @@ static void mv_hash_algo_completion(void) | |||
420 | (req))); | 414 | (req))); |
421 | } else | 415 | } else |
422 | mv_hash_final_fallback(req); | 416 | mv_hash_final_fallback(req); |
417 | } else { | ||
418 | ctx->state[0] = readl(cpg->reg + DIGEST_INITIAL_VAL_A); | ||
419 | ctx->state[1] = readl(cpg->reg + DIGEST_INITIAL_VAL_B); | ||
420 | ctx->state[2] = readl(cpg->reg + DIGEST_INITIAL_VAL_C); | ||
421 | ctx->state[3] = readl(cpg->reg + DIGEST_INITIAL_VAL_D); | ||
422 | ctx->state[4] = readl(cpg->reg + DIGEST_INITIAL_VAL_E); | ||
423 | } | 423 | } |
424 | } | 424 | } |
425 | 425 | ||