diff options
author | Dan Carpenter <dan.carpenter@oracle.com> | 2013-08-20 04:54:48 -0400 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2013-08-21 07:28:07 -0400 |
commit | 5bc357037476bf8d4623ab4ef0d1640b947c4625 (patch) | |
tree | 9abd9c9aa71d823649b4a58a37868c4b832b4d89 /drivers/crypto | |
parent | 393e661d6167c1b7444704191ea1d01aa3447894 (diff) |
crypto: tegra-aes - bitwise vs logical and
The bug here is that:
while (eng_busy & (!icq_empty) & dma_busy)
is never true because it's using bitwise instead of logical ANDs. The
other bitwise AND conditions work as intended but I changed them as well
for consistency.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto')
-rw-r--r-- | drivers/crypto/tegra-aes.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c index 85ea7525fa36..2d58da972ae2 100644 --- a/drivers/crypto/tegra-aes.c +++ b/drivers/crypto/tegra-aes.c | |||
@@ -275,7 +275,7 @@ static int aes_start_crypt(struct tegra_aes_dev *dd, u32 in_addr, u32 out_addr, | |||
275 | value = aes_readl(dd, TEGRA_AES_INTR_STATUS); | 275 | value = aes_readl(dd, TEGRA_AES_INTR_STATUS); |
276 | eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD; | 276 | eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD; |
277 | icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD; | 277 | icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD; |
278 | } while (eng_busy & (!icq_empty)); | 278 | } while (eng_busy && !icq_empty); |
279 | aes_writel(dd, cmdq[i], TEGRA_AES_ICMDQUE_WR); | 279 | aes_writel(dd, cmdq[i], TEGRA_AES_ICMDQUE_WR); |
280 | } | 280 | } |
281 | 281 | ||
@@ -365,7 +365,7 @@ static int aes_set_key(struct tegra_aes_dev *dd) | |||
365 | eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD; | 365 | eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD; |
366 | icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD; | 366 | icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD; |
367 | dma_busy = value & TEGRA_AES_DMA_BUSY_FIELD; | 367 | dma_busy = value & TEGRA_AES_DMA_BUSY_FIELD; |
368 | } while (eng_busy & (!icq_empty) & dma_busy); | 368 | } while (eng_busy && !icq_empty && dma_busy); |
369 | 369 | ||
370 | /* settable command to get key into internal registers */ | 370 | /* settable command to get key into internal registers */ |
371 | value = CMD_SETTABLE << CMDQ_OPCODE_SHIFT | | 371 | value = CMD_SETTABLE << CMDQ_OPCODE_SHIFT | |
@@ -379,7 +379,7 @@ static int aes_set_key(struct tegra_aes_dev *dd) | |||
379 | value = aes_readl(dd, TEGRA_AES_INTR_STATUS); | 379 | value = aes_readl(dd, TEGRA_AES_INTR_STATUS); |
380 | eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD; | 380 | eng_busy = value & TEGRA_AES_ENGINE_BUSY_FIELD; |
381 | icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD; | 381 | icq_empty = value & TEGRA_AES_ICQ_EMPTY_FIELD; |
382 | } while (eng_busy & (!icq_empty)); | 382 | } while (eng_busy && !icq_empty); |
383 | 383 | ||
384 | return 0; | 384 | return 0; |
385 | } | 385 | } |