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authorBen Widawsky <benjamin.widawsky@intel.com>2013-09-20 12:35:30 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-01 01:45:12 -0400
commit18b5992c37560dffc52b84dec7f83738847cf5c7 (patch)
treef4942bc743519306af364d2d154e3e7ab3786ed6 /drivers/crypto
parent50003939b5a45df44b3b4bd1ccd46e3c50aa5e65 (diff)
drm/i915: Calculate PSR register offsets from base + gen
Future generations will be changing these registers (thanks to design for giving us an early heads up). To help abstract, create the definition of the base of the register block, and define all registers relative to that. Design has promised to not change the offsets relative to the base. v2: Also change IS_HASWELL checks to HAS_PSR CC: Rodrigo Vivi <rodrigo.vivi@gmail.com> CC: Intel GFX <intel-gfx@lists.freedesktop.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/crypto')
0 files changed, 0 insertions, 0 deletions