diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2012-01-02 08:50:15 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-03 10:17:56 -0500 |
| commit | cfef0320ead7d707c363b18bb6f13f6c3bda316a (patch) | |
| tree | ee60233e44e47e5ad5b4b9431c5b30091b897168 /drivers/clocksource | |
| parent | 9f9df00accb343f61a5782904af10366a18ebb5a (diff) | |
ARM: 7261/1: clocksource/ux500-prcmu: fix sched_clock breakage
commit 2f0778afac79bd8d226225556858a636931eeabc adding
runtime-selectable sched_clock() forgot to patch this
driver down in drivers/clocksource, this patch fixes
the problem.
Reported-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/clksrc-dbx500-prcmu.c | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index 59feefe0e3e6..fb6b6d28b60e 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c | |||
| @@ -58,25 +58,15 @@ static struct clocksource clocksource_dbx500_prcmu = { | |||
| 58 | }; | 58 | }; |
| 59 | 59 | ||
| 60 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK | 60 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK |
| 61 | static DEFINE_CLOCK_DATA(cd); | ||
| 62 | 61 | ||
| 63 | unsigned long long notrace sched_clock(void) | 62 | static u32 notrace dbx500_prcmu_sched_clock_read(void) |
| 64 | { | 63 | { |
| 65 | u32 cyc; | ||
| 66 | |||
| 67 | if (unlikely(!clksrc_dbx500_timer_base)) | 64 | if (unlikely(!clksrc_dbx500_timer_base)) |
| 68 | return 0; | 65 | return 0; |
| 69 | 66 | ||
| 70 | cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); | 67 | return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); |
| 71 | |||
| 72 | return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
| 73 | } | 68 | } |
| 74 | 69 | ||
| 75 | static void notrace clksrc_dbx500_prcmu_update_sched_clock(void) | ||
| 76 | { | ||
| 77 | u32 cyc = clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu); | ||
| 78 | update_sched_clock(&cd, cyc, (u32)~0); | ||
| 79 | } | ||
| 80 | #endif | 70 | #endif |
| 81 | 71 | ||
| 82 | void __init clksrc_dbx500_prcmu_init(void __iomem *base) | 72 | void __init clksrc_dbx500_prcmu_init(void __iomem *base) |
| @@ -97,7 +87,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base) | |||
| 97 | clksrc_dbx500_timer_base + PRCMU_TIMER_REF); | 87 | clksrc_dbx500_timer_base + PRCMU_TIMER_REF); |
| 98 | } | 88 | } |
| 99 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK | 89 | #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK |
| 100 | init_sched_clock(&cd, clksrc_dbx500_prcmu_update_sched_clock, | 90 | setup_sched_clock(dbx500_prcmu_sched_clock_read, |
| 101 | 32, RATE_32K); | 91 | 32, RATE_32K); |
| 102 | #endif | 92 | #endif |
| 103 | clocksource_calc_mult_shift(&clocksource_dbx500_prcmu, | 93 | clocksource_calc_mult_shift(&clocksource_dbx500_prcmu, |
