clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC)

Add a driver for the global clock controller found on MSM 8974
based platforms. This should allow most multimedia device drivers
to probe and control their clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

3 files changed, 2635 insertions, 0 deletions

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 7a1325119637..7b582dd5cd08 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -28,3 +28,12 @@ config MSM_GCC_8974
           Support for the global clock controller on msm8974 devices.
           Say Y if you want to use peripheral devices such as UART, SPI,
           i2c, USB, SD/eMMC, SATA, PCIe, etc.
+
+config MSM_MMCC_8974
+        tristate "MSM8974 Multimedia Clock Controller"
+        select MSM_GCC_8974
+        depends on COMMON_CLK_QCOM
+        help
+          Support for the multimedia clock controller on msm8974 devices.
+          Say Y if you want to support multimedia devices such as display,
+          graphics, video encode/decode, camera, etc.
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 10883e6306de..e00cb848a1ae 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -10,3 +10,4 @@ clk-qcom-$(CONFIG_COMMON_CLK_QCOM) += reset.o
 obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
 obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
+obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
diff --git a/drivers/clk/qcom/mmcc-msm8974.c b/drivers/clk/qcom/mmcc-msm8974.c
new file mode 100644
index 000000000000..c95774514b81
--- /dev/null
+++ b/drivers/clk/qcom/mmcc-msm8974.c
@@ -0,0 +1,2625 @@
+/*
+ * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/clk-provider.h>
+#include <linux/regmap.h>
+#include <linux/reset-controller.h>
+
+#include <dt-bindings/clock/qcom,mmcc-msm8974.h>
+#include <dt-bindings/reset/qcom,mmcc-msm8974.h>
+
+#include "clk-regmap.h"
+#include "clk-pll.h"
+#include "clk-rcg.h"
+#include "clk-branch.h"
+#include "reset.h"
+
+#define P_XO            0
+#define P_MMPLL0        1
+#define P_EDPLINK       1
+#define P_MMPLL1        2
+#define P_HDMIPLL       2
+#define P_GPLL0         3
+#define P_EDPVCO        3
+#define P_GPLL1         4
+#define P_DSI0PLL       4
+#define P_MMPLL2        4
+#define P_MMPLL3        4
+#define P_DSI1PLL       5
+
+static const u8 mmcc_xo_mmpll0_mmpll1_gpll0_map[] = {
+        [P_XO]          = 0,
+        [P_MMPLL0]      = 1,
+        [P_MMPLL1]      = 2,
+        [P_GPLL0]       = 5,
+};
+
+static const char *mmcc_xo_mmpll0_mmpll1_gpll0[] = {
+        "xo",
+        "mmpll0_vote",
+        "mmpll1_vote",
+        "mmss_gpll0_vote",
+};
+
+static const u8 mmcc_xo_mmpll0_dsi_hdmi_gpll0_map[] = {
+        [P_XO]          = 0,
+        [P_MMPLL0]      = 1,
+        [P_HDMIPLL]     = 4,
+        [P_GPLL0]       = 5,
+        [P_DSI0PLL]     = 2,
+        [P_DSI1PLL]     = 3,
+};
+
+static const char *mmcc_xo_mmpll0_dsi_hdmi_gpll0[] = {
+        "xo",
+        "mmpll0_vote",
+        "hdmipll",
+        "mmss_gpll0_vote",
+        "dsi0pll",
+        "dsi1pll",
+};
+
+static const u8 mmcc_xo_mmpll0_1_2_gpll0_map[] = {
+        [P_XO]          = 0,
+        [P_MMPLL0]      = 1,
+        [P_MMPLL1]      = 2,
+        [P_GPLL0]       = 5,
+        [P_MMPLL2]      = 3,
+};
+
+static const char *mmcc_xo_mmpll0_1_2_gpll0[] = {
+        "xo",
+        "mmpll0_vote",
+        "mmpll1_vote",
+        "mmss_gpll0_vote",
+        "mmpll2",
+};
+
+static const u8 mmcc_xo_mmpll0_1_3_gpll0_map[] = {
+        [P_XO]          = 0,
+        [P_MMPLL0]      = 1,
+        [P_MMPLL1]      = 2,
+        [P_GPLL0]       = 5,
+        [P_MMPLL3]      = 3,
+};
+
+static const char *mmcc_xo_mmpll0_1_3_gpll0[] = {
+        "xo",
+        "mmpll0_vote",
+        "mmpll1_vote",
+        "mmss_gpll0_vote",
+        "mmpll3",
+};
+
+static const u8 mmcc_xo_mmpll0_1_gpll1_0_map[] = {
+        [P_XO]          = 0,
+        [P_MMPLL0]      = 1,
+        [P_MMPLL1]      = 2,
+        [P_GPLL0]       = 5,
+        [P_GPLL1]       = 4,
+};
+
+static const char *mmcc_xo_mmpll0_1_gpll1_0[] = {
+        "xo",
+        "mmpll0_vote",
+        "mmpll1_vote",
+        "mmss_gpll0_vote",
+        "gpll1_vote",
+};
+
+static const u8 mmcc_xo_dsi_hdmi_edp_map[] = {
+        [P_XO]          = 0,
+        [P_EDPLINK]     = 4,
+        [P_HDMIPLL]     = 3,
+        [P_EDPVCO]      = 5,
+        [P_DSI0PLL]     = 1,
+        [P_DSI1PLL]     = 2,
+};
+
+static const char *mmcc_xo_dsi_hdmi_edp[] = {
+        "xo",
+        "edp_link_clk",
+        "hdmipll",
+        "edp_vco_div",
+        "dsi0pll",
+        "dsi1pll",
+};
+
+static const u8 mmcc_xo_dsi_hdmi_edp_gpll0_map[] = {
+        [P_XO]          = 0,
+        [P_EDPLINK]     = 4,
+        [P_HDMIPLL]     = 3,
+        [P_GPLL0]       = 5,
+        [P_DSI0PLL]     = 1,
+        [P_DSI1PLL]     = 2,
+};
+
+static const char *mmcc_xo_dsi_hdmi_edp_gpll0[] = {
+        "xo",
+        "edp_link_clk",
+        "hdmipll",
+        "gpll0_vote",
+        "dsi0pll",
+        "dsi1pll",
+};
+
+#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
+
+static struct clk_pll mmpll0 = {
+        .l_reg = 0x0004,
+        .m_reg = 0x0008,
+        .n_reg = 0x000c,
+        .config_reg = 0x0014,