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authorLee Jones <lee.jones@linaro.org>2013-09-17 05:35:00 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-09-26 05:05:57 -0400
commit4e33466095e045520c441f357f2b8f8ec2e363c2 (patch)
tree9737e30486b385d47f69a67366a243c30902bde1 /drivers/clk
parentd625a730675decc49f25f761d0e2e20e45e0ff46 (diff)
clk: ux500: Add Device Tree support for the TWD clock
This patch enables the TWD fixed factor clock to be specified from Device Tree via phandles to the "smp-twd-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/ux500/u8500_of_clk.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c
index fc647cf1dd97..0769db85e772 100644
--- a/drivers/clk/ux500/u8500_of_clk.c
+++ b/drivers/clk/ux500/u8500_of_clk.c
@@ -60,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
60 struct device_node *np = NULL; 60 struct device_node *np = NULL;
61 struct device_node *child = NULL; 61 struct device_node *child = NULL;
62 const char *sgaclk_parent = NULL; 62 const char *sgaclk_parent = NULL;
63 struct clk *clk, *rtc_clk; 63 struct clk *clk, *rtc_clk, *twd_clk;
64 64
65 if (of_have_populated_dt()) 65 if (of_have_populated_dt())
66 np = of_find_matching_node(NULL, u8500_clk_of_match); 66 np = of_find_matching_node(NULL, u8500_clk_of_match);
@@ -234,7 +234,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
234 clk = clk_reg_prcmu_scalable_rate("armss", NULL, 234 clk = clk_reg_prcmu_scalable_rate("armss", NULL,
235 PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED); 235 PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED);
236 236
237 clk = clk_register_fixed_factor(NULL, "smp_twd", "armss", 237 twd_clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",
238 CLK_IGNORE_UNUSED, 1, 2); 238 CLK_IGNORE_UNUSED, 1, 2);
239 239
240 /* 240 /*
@@ -551,5 +551,8 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
551 551
552 if (!of_node_cmp(child->name, "rtc32k-clock")) 552 if (!of_node_cmp(child->name, "rtc32k-clock"))
553 of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk); 553 of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk);
554
555 if (!of_node_cmp(child->name, "smp-twd-clock"))
556 of_clk_add_provider(child, of_clk_src_simple_get, twd_clk);
554 } 557 }
555} 558}