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authorMike Turquette <mturquette@linaro.org>2014-02-19 00:41:40 -0500
committerMike Turquette <mturquette@linaro.org>2014-02-19 00:41:40 -0500
commit37a4493ee73b93c4d25e57d5ac975e4cb48165f5 (patch)
tree897a5792602fc400835155b8f4dd08bf72b6791b /drivers/clk
parent8510e7263ad9399e771e0f67517a0d5409390445 (diff)
parent58d516ae95cbf7eed44f85a01cdfad41f17b4197 (diff)
Merge tag 'mvebu-clk-fixes-3.14' of git://git.infradead.org/linux-mvebu into clk-fixes
mvebu clock fixes for v3.14 - kirkwood, dove, armada-xp, armada-370 - force clock init order broken by sorting DT ocp nodes by address - fixes boot failures on affected platforms
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/mvebu/armada-370.c21
-rw-r--r--drivers/clk/mvebu/armada-xp.c20
-rw-r--r--drivers/clk/mvebu/dove.c19
-rw-r--r--drivers/clk/mvebu/kirkwood.c34
4 files changed, 44 insertions, 50 deletions
diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c
index 81a202d12a7a..bef198a83863 100644
--- a/drivers/clk/mvebu/armada-370.c
+++ b/drivers/clk/mvebu/armada-370.c
@@ -141,13 +141,6 @@ static const struct coreclk_soc_desc a370_coreclks = {
141 .num_ratios = ARRAY_SIZE(a370_coreclk_ratios), 141 .num_ratios = ARRAY_SIZE(a370_coreclk_ratios),
142}; 142};
143 143
144static void __init a370_coreclk_init(struct device_node *np)
145{
146 mvebu_coreclk_setup(np, &a370_coreclks);
147}
148CLK_OF_DECLARE(a370_core_clk, "marvell,armada-370-core-clock",
149 a370_coreclk_init);
150
151/* 144/*
152 * Clock Gating Control 145 * Clock Gating Control
153 */ 146 */
@@ -168,9 +161,15 @@ static const struct clk_gating_soc_desc a370_gating_desc[] __initconst = {
168 { } 161 { }
169}; 162};
170 163
171static void __init a370_clk_gating_init(struct device_node *np) 164static void __init a370_clk_init(struct device_node *np)
172{ 165{
173 mvebu_clk_gating_setup(np, a370_gating_desc); 166 struct device_node *cgnp =
167 of_find_compatible_node(NULL, NULL, "marvell,armada-370-gating-clock");
168
169 mvebu_coreclk_setup(np, &a370_coreclks);
170
171 if (cgnp)
172 mvebu_clk_gating_setup(cgnp, a370_gating_desc);
174} 173}
175CLK_OF_DECLARE(a370_clk_gating, "marvell,armada-370-gating-clock", 174CLK_OF_DECLARE(a370_clk, "marvell,armada-370-core-clock", a370_clk_init);
176 a370_clk_gating_init); 175
diff --git a/drivers/clk/mvebu/armada-xp.c b/drivers/clk/mvebu/armada-xp.c
index 9922c4475aa8..b3094315a3c0 100644
--- a/drivers/clk/mvebu/armada-xp.c
+++ b/drivers/clk/mvebu/armada-xp.c
@@ -158,13 +158,6 @@ static const struct coreclk_soc_desc axp_coreclks = {
158 .num_ratios = ARRAY_SIZE(axp_coreclk_ratios), 158 .num_ratios = ARRAY_SIZE(axp_coreclk_ratios),
159}; 159};
160 160
161static void __init axp_coreclk_init(struct device_node *np)
162{
163 mvebu_coreclk_setup(np, &axp_coreclks);
164}
165CLK_OF_DECLARE(axp_core_clk, "marvell,armada-xp-core-clock",
166 axp_coreclk_init);
167
168/* 161/*
169 * Clock Gating Control 162 * Clock Gating Control
170 */ 163 */
@@ -202,9 +195,14 @@ static const struct clk_gating_soc_desc axp_gating_desc[] __initconst = {
202 { } 195 { }
203}; 196};
204 197
205static void __init axp_clk_gating_init(struct device_node *np) 198static void __init axp_clk_init(struct device_node *np)
206{ 199{
207 mvebu_clk_gating_setup(np, axp_gating_desc); 200 struct device_node *cgnp =
201 of_find_compatible_node(NULL, NULL, "marvell,armada-xp-gating-clock");
202
203 mvebu_coreclk_setup(np, &axp_coreclks);
204
205 if (cgnp)
206 mvebu_clk_gating_setup(cgnp, axp_gating_desc);
208} 207}
209CLK_OF_DECLARE(axp_clk_gating, "marvell,armada-xp-gating-clock", 208CLK_OF_DECLARE(axp_clk, "marvell,armada-xp-core-clock", axp_clk_init);
210 axp_clk_gating_init);
diff --git a/drivers/clk/mvebu/dove.c b/drivers/clk/mvebu/dove.c
index 38aee1e3f242..b8c2424ac926 100644
--- a/drivers/clk/mvebu/dove.c
+++ b/drivers/clk/mvebu/dove.c
@@ -154,12 +154,6 @@ static const struct coreclk_soc_desc dove_coreclks = {
154 .num_ratios = ARRAY_SIZE(dove_coreclk_ratios), 154 .num_ratios = ARRAY_SIZE(dove_coreclk_ratios),
155}; 155};
156 156
157static void __init dove_coreclk_init(struct device_node *np)
158{
159 mvebu_coreclk_setup(np, &dove_coreclks);
160}
161CLK_OF_DECLARE(dove_core_clk, "marvell,dove-core-clock", dove_coreclk_init);
162
163/* 157/*
164 * Clock Gating Control 158 * Clock Gating Control
165 */ 159 */
@@ -186,9 +180,14 @@ static const struct clk_gating_soc_desc dove_gating_desc[] __initconst = {
186 { } 180 { }
187}; 181};
188 182
189static void __init dove_clk_gating_init(struct device_node *np) 183static void __init dove_clk_init(struct device_node *np)
190{ 184{
191 mvebu_clk_gating_setup(np, dove_gating_desc); 185 struct device_node *cgnp =
186 of_find_compatible_node(NULL, NULL, "marvell,dove-gating-clock");
187
188 mvebu_coreclk_setup(np, &dove_coreclks);
189
190 if (cgnp)
191 mvebu_clk_gating_setup(cgnp, dove_gating_desc);
192} 192}
193CLK_OF_DECLARE(dove_clk_gating, "marvell,dove-gating-clock", 193CLK_OF_DECLARE(dove_clk, "marvell,dove-core-clock", dove_clk_init);
194 dove_clk_gating_init);
diff --git a/drivers/clk/mvebu/kirkwood.c b/drivers/clk/mvebu/kirkwood.c
index 2636a55f29f9..ddb666a86500 100644
--- a/drivers/clk/mvebu/kirkwood.c
+++ b/drivers/clk/mvebu/kirkwood.c
@@ -193,13 +193,6 @@ static const struct coreclk_soc_desc kirkwood_coreclks = {
193 .num_ratios = ARRAY_SIZE(kirkwood_coreclk_ratios), 193 .num_ratios = ARRAY_SIZE(kirkwood_coreclk_ratios),
194}; 194};
195 195
196static void __init kirkwood_coreclk_init(struct device_node *np)
197{
198 mvebu_coreclk_setup(np, &kirkwood_coreclks);
199}
200CLK_OF_DECLARE(kirkwood_core_clk, "marvell,kirkwood-core-clock",
201 kirkwood_coreclk_init);
202
203static const struct coreclk_soc_desc mv88f6180_coreclks = { 196static const struct coreclk_soc_desc mv88f6180_coreclks = {
204 .get_tclk_freq = kirkwood_get_tclk_freq, 197 .get_tclk_freq = kirkwood_get_tclk_freq,
205 .get_cpu_freq = mv88f6180_get_cpu_freq, 198 .get_cpu_freq = mv88f6180_get_cpu_freq,
@@ -208,13 +201,6 @@ static const struct coreclk_soc_desc mv88f6180_coreclks = {
208 .num_ratios = ARRAY_SIZE(kirkwood_coreclk_ratios), 201 .num_ratios = ARRAY_SIZE(kirkwood_coreclk_ratios),
209}; 202};
210 203
211static void __init mv88f6180_coreclk_init(struct device_node *np)
212{
213 mvebu_coreclk_setup(np, &mv88f6180_coreclks);
214}
215CLK_OF_DECLARE(mv88f6180_core_clk, "marvell,mv88f6180-core-clock",
216 mv88f6180_coreclk_init);
217
218/* 204/*
219 * Clock Gating Control 205 * Clock Gating Control
220 */ 206 */
@@ -239,9 +225,21 @@ static const struct clk_gating_soc_desc kirkwood_gating_desc[] __initconst = {
239 { } 225 { }
240}; 226};
241 227
242static void __init kirkwood_clk_gating_init(struct device_node *np) 228static void __init kirkwood_clk_init(struct device_node *np)
243{ 229{
244 mvebu_clk_gating_setup(np, kirkwood_gating_desc); 230 struct device_node *cgnp =
231 of_find_compatible_node(NULL, NULL, "marvell,kirkwood-gating-clock");
232
233
234 if (of_device_is_compatible(np, "marvell,mv88f6180-core-clock"))
235 mvebu_coreclk_setup(np, &mv88f6180_coreclks);
236 else
237 mvebu_coreclk_setup(np, &kirkwood_coreclks);
238
239 if (cgnp)
240 mvebu_clk_gating_setup(cgnp, kirkwood_gating_desc);
245} 241}
246CLK_OF_DECLARE(kirkwood_clk_gating, "marvell,kirkwood-gating-clock", 242CLK_OF_DECLARE(kirkwood_clk, "marvell,kirkwood-core-clock",
247 kirkwood_clk_gating_init); 243 kirkwood_clk_init);
244CLK_OF_DECLARE(mv88f6180_clk, "marvell,mv88f6180-core-clock",
245 kirkwood_clk_init);