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authorDave Airlie <airlied@redhat.com>2013-06-27 06:40:44 -0400
committerDave Airlie <airlied@redhat.com>2013-06-27 06:40:44 -0400
commit4300a0f8bdcce5a03b88bfa16fc9827e15c52dc4 (patch)
treedea0276d7d0a12147f04ddbef9121e32e903c5ca /drivers/clk/x86
parent160954b7bca43da7cd3cfbce310e6df919a8216e (diff)
parent9e895ace5d82df8929b16f58e9f515f6d54ab82d (diff)
Merge tag 'v3.10-rc7' into drm-next
Linux 3.10-rc7 The sdvo lvds fix in this -fixes pull commit c3456fb3e4712d0448592af3c5d644c9472cd3c1 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Jun 10 09:47:58 2013 +0200 drm/i915: prefer VBT modes for SVDO-LVDS over EDID has a silent functional conflict with commit 990256aec2f10800595dddf4d1c3441fcd6b2616 Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Fri May 31 12:17:07 2013 +0000 drm: Add probed modes in probe order in drm-next. W simply need to add the vbt modes before edid modes, i.e. the other way round than now. Conflicts: drivers/gpu/drm/drm_prime.c drivers/gpu/drm/i915/intel_sdvo.c
Diffstat (limited to 'drivers/clk/x86')
-rw-r--r--drivers/clk/x86/clk-lpt.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/clk/x86/clk-lpt.c b/drivers/clk/x86/clk-lpt.c
index 5cf4f4686406..4f45eee9e33b 100644
--- a/drivers/clk/x86/clk-lpt.c
+++ b/drivers/clk/x86/clk-lpt.c
@@ -15,22 +15,29 @@
15#include <linux/clk-provider.h> 15#include <linux/clk-provider.h>
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/platform_data/clk-lpss.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19 20
20#define PRV_CLOCK_PARAMS 0x800 21#define PRV_CLOCK_PARAMS 0x800
21 22
22static int lpt_clk_probe(struct platform_device *pdev) 23static int lpt_clk_probe(struct platform_device *pdev)
23{ 24{
25 struct lpss_clk_data *drvdata;
24 struct clk *clk; 26 struct clk *clk;
25 27
28 drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
29 if (!drvdata)
30 return -ENOMEM;
31
26 /* LPSS free running clock */ 32 /* LPSS free running clock */
27 clk = clk_register_fixed_rate(&pdev->dev, "lpss_clk", NULL, CLK_IS_ROOT, 33 drvdata->name = "lpss_clk";
28 100000000); 34 clk = clk_register_fixed_rate(&pdev->dev, drvdata->name, NULL,
35 CLK_IS_ROOT, 100000000);
29 if (IS_ERR(clk)) 36 if (IS_ERR(clk))
30 return PTR_ERR(clk); 37 return PTR_ERR(clk);
31 38
32 /* Shared DMA clock */ 39 drvdata->clk = clk;
33 clk_register_clkdev(clk, "hclk", "INTL9C60.0.auto"); 40 platform_set_drvdata(pdev, drvdata);
34 return 0; 41 return 0;
35} 42}
36 43