aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk/tegra
diff options
context:
space:
mode:
authorThierry Reding <thierry.reding@gmail.com>2013-11-27 11:26:03 -0500
committerPeter De Schrijver <pdeschrijver@nvidia.com>2013-11-28 07:54:43 -0500
commit8ba4b3b9cc3d95714b31467614205fc26b91fb7c (patch)
tree4fdd5ff7f1a8b499adde5d233a32d3d5718dbb29 /drivers/clk/tegra
parent39409aa4244f22eae3fa8f8db4b0cf9466b73c44 (diff)
clk: tegra: Do not print errors for clk_round_rate()
clk_round_rate() can be used by drivers to determine whether or not a frequency is supported by the clock. The current Tegra clock driver outputs an error message and a stacktrace when the requested rate isn't supported. That's fine for clk_set_rate(), but it's confusing when all the driver does is query whether or not a frequency is supported. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra')
-rw-r--r--drivers/clk/tegra/clk-pll.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 689c468aca2f..8eb2755c71b3 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -435,9 +435,6 @@ static int _calc_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg,
435 if (cfg->m > divm_max(pll) || cfg->n > divn_max(pll) || 435 if (cfg->m > divm_max(pll) || cfg->n > divn_max(pll) ||
436 (1 << p_div) > divp_max(pll) 436 (1 << p_div) > divp_max(pll)
437 || cfg->output_rate > pll->params->vco_max) { 437 || cfg->output_rate > pll->params->vco_max) {
438 pr_err("%s: Failed to set %s rate %lu\n",
439 __func__, __clk_get_name(hw->clk), rate);
440 WARN_ON(1);
441 return -EINVAL; 438 return -EINVAL;
442 } 439 }
443 440
@@ -584,6 +581,8 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
584 581
585 if (_get_table_rate(hw, &cfg, rate, parent_rate) && 582 if (_get_table_rate(hw, &cfg, rate, parent_rate) &&
586 _calc_rate(hw, &cfg, rate, parent_rate)) { 583 _calc_rate(hw, &cfg, rate, parent_rate)) {
584 pr_err("%s: Failed to set %s rate %lu\n", __func__,
585 __clk_get_name(hw->clk), rate);
587 WARN_ON(1); 586 WARN_ON(1);
588 return -EINVAL; 587 return -EINVAL;
589 } 588 }
@@ -615,10 +614,8 @@ static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
615 return __clk_get_rate(hw->clk); 614 return __clk_get_rate(hw->clk);
616 615
617 if (_get_table_rate(hw, &cfg, rate, *prate) && 616 if (_get_table_rate(hw, &cfg, rate, *prate) &&
618 _calc_rate(hw, &cfg, rate, *prate)) { 617 _calc_rate(hw, &cfg, rate, *prate))
619 WARN_ON(1);
620 return -EINVAL; 618 return -EINVAL;
621 }
622 619
623 return cfg.output_rate; 620 return cfg.output_rate;
624} 621}