diff options
author | Gabriel FERNANDEZ <gabriel.fernandez@st.com> | 2014-07-15 11:20:18 -0400 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2014-07-29 01:35:55 -0400 |
commit | 4abb1b405547947d1f0381b22d0ed01262a69d92 (patch) | |
tree | 3905865c734c41f9e59cbfb2f2f23cf7b42e2b7f /drivers/clk/st | |
parent | 0268099c8909b00c8acdf3089732d88b9b43ad14 (diff) |
clk: st: use static const for stm_fs tables
converts stm_fs tables into static const
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/st')
-rw-r--r-- | drivers/clk/st/clkgen-fsyn.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index 4f53ee0778d9..a7e5db483061 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c | |||
@@ -41,7 +41,7 @@ struct stm_fs { | |||
41 | unsigned long nsdiv; | 41 | unsigned long nsdiv; |
42 | }; | 42 | }; |
43 | 43 | ||
44 | static struct stm_fs fs216c65_rtbl[] = { | 44 | static const struct stm_fs fs216c65_rtbl[] = { |
45 | { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 312.5 Khz */ | 45 | { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 312.5 Khz */ |
46 | { .mdiv = 0x17, .pe = 0x25ed, .sdiv = 0x1, .nsdiv = 0 }, /* 27 MHz */ | 46 | { .mdiv = 0x17, .pe = 0x25ed, .sdiv = 0x1, .nsdiv = 0 }, /* 27 MHz */ |
47 | { .mdiv = 0x1a, .pe = 0x7b36, .sdiv = 0x2, .nsdiv = 1 }, /* 36.87 MHz */ | 47 | { .mdiv = 0x1a, .pe = 0x7b36, .sdiv = 0x2, .nsdiv = 1 }, /* 36.87 MHz */ |
@@ -49,13 +49,13 @@ static struct stm_fs fs216c65_rtbl[] = { | |||
49 | { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x1, .nsdiv = 1 }, /* 108 MHz */ | 49 | { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x1, .nsdiv = 1 }, /* 108 MHz */ |
50 | }; | 50 | }; |
51 | 51 | ||
52 | static struct stm_fs fs432c65_rtbl[] = { | 52 | static const struct stm_fs fs432c65_rtbl[] = { |
53 | { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 625 Khz */ | 53 | { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 625 Khz */ |
54 | { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x2, .nsdiv = 1 }, /* 108 MHz */ | 54 | { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x2, .nsdiv = 1 }, /* 108 MHz */ |
55 | { .mdiv = 0x19, .pe = 0x121a, .sdiv = 0x0, .nsdiv = 1 }, /* 297 MHz */ | 55 | { .mdiv = 0x19, .pe = 0x121a, .sdiv = 0x0, .nsdiv = 1 }, /* 297 MHz */ |
56 | }; | 56 | }; |
57 | 57 | ||
58 | static struct stm_fs fs660c32_rtbl[] = { | 58 | static const struct stm_fs fs660c32_rtbl[] = { |
59 | { .mdiv = 0x01, .pe = 0x2aaa, .sdiv = 0x8, .nsdiv = 0 }, /* 600 KHz */ | 59 | { .mdiv = 0x01, .pe = 0x2aaa, .sdiv = 0x8, .nsdiv = 0 }, /* 600 KHz */ |
60 | { .mdiv = 0x02, .pe = 0x3d33, .sdiv = 0x0, .nsdiv = 0 }, /* 148.5 Mhz */ | 60 | { .mdiv = 0x02, .pe = 0x3d33, .sdiv = 0x0, .nsdiv = 0 }, /* 148.5 Mhz */ |
61 | { .mdiv = 0x13, .pe = 0x5bcc, .sdiv = 0x0, .nsdiv = 1 }, /* 297 Mhz */ | 61 | { .mdiv = 0x13, .pe = 0x5bcc, .sdiv = 0x0, .nsdiv = 1 }, /* 297 Mhz */ |
@@ -82,9 +82,9 @@ struct clkgen_quadfs_data { | |||
82 | struct clkgen_field nsdiv[QUADFS_MAX_CHAN]; | 82 | struct clkgen_field nsdiv[QUADFS_MAX_CHAN]; |
83 | 83 | ||
84 | const struct clk_ops *pll_ops; | 84 | const struct clk_ops *pll_ops; |
85 | struct stm_fs *rtbl; | 85 | const struct stm_fs *rtbl; |
86 | u8 rtbl_cnt; | 86 | u8 rtbl_cnt; |
87 | int (*get_rate)(unsigned long , struct stm_fs *, | 87 | int (*get_rate)(unsigned long , const struct stm_fs *, |
88 | unsigned long *); | 88 | unsigned long *); |
89 | }; | 89 | }; |
90 | 90 | ||
@@ -94,11 +94,11 @@ static const struct clk_ops st_quadfs_fs216c65_ops; | |||
94 | static const struct clk_ops st_quadfs_fs432c65_ops; | 94 | static const struct clk_ops st_quadfs_fs432c65_ops; |
95 | static const struct clk_ops st_quadfs_fs660c32_ops; | 95 | static const struct clk_ops st_quadfs_fs660c32_ops; |
96 | 96 | ||
97 | static int clk_fs216c65_get_rate(unsigned long, struct stm_fs *, | 97 | static int clk_fs216c65_get_rate(unsigned long, const struct stm_fs *, |
98 | unsigned long *); | 98 | unsigned long *); |
99 | static int clk_fs432c65_get_rate(unsigned long, struct stm_fs *, | 99 | static int clk_fs432c65_get_rate(unsigned long, const struct stm_fs *, |
100 | unsigned long *); | 100 | unsigned long *); |
101 | static int clk_fs660c32_dig_get_rate(unsigned long, struct stm_fs *, | 101 | static int clk_fs660c32_dig_get_rate(unsigned long, const struct stm_fs *, |
102 | unsigned long *); | 102 | unsigned long *); |
103 | /* | 103 | /* |
104 | * Values for all of the standalone instances of this clock | 104 | * Values for all of the standalone instances of this clock |
@@ -106,7 +106,7 @@ static int clk_fs660c32_dig_get_rate(unsigned long, struct stm_fs *, | |||
106 | * that the individual channel standby control bits (nsb) are in the | 106 | * that the individual channel standby control bits (nsb) are in the |
107 | * first register along with the PLL control bits. | 107 | * first register along with the PLL control bits. |
108 | */ | 108 | */ |
109 | static struct clkgen_quadfs_data st_fs216c65_416 = { | 109 | static const struct clkgen_quadfs_data st_fs216c65_416 = { |
110 | /* 416 specific */ | 110 | /* 416 specific */ |
111 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), | 111 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), |
112 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), | 112 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), |
@@ -143,7 +143,7 @@ static struct clkgen_quadfs_data st_fs216c65_416 = { | |||
143 | .get_rate = clk_fs216c65_get_rate, | 143 | .get_rate = clk_fs216c65_get_rate, |
144 | }; | 144 | }; |
145 | 145 | ||
146 | static struct clkgen_quadfs_data st_fs432c65_416 = { | 146 | static const struct clkgen_quadfs_data st_fs432c65_416 = { |
147 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), | 147 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), |
148 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), | 148 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), |
149 | CLKGEN_FIELD(0x0, 0x1, 11), | 149 | CLKGEN_FIELD(0x0, 0x1, 11), |
@@ -179,7 +179,7 @@ static struct clkgen_quadfs_data st_fs432c65_416 = { | |||
179 | .get_rate = clk_fs432c65_get_rate, | 179 | .get_rate = clk_fs432c65_get_rate, |
180 | }; | 180 | }; |
181 | 181 | ||
182 | static struct clkgen_quadfs_data st_fs660c32_E_416 = { | 182 | static const struct clkgen_quadfs_data st_fs660c32_E_416 = { |
183 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), | 183 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), |
184 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), | 184 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), |
185 | CLKGEN_FIELD(0x0, 0x1, 11), | 185 | CLKGEN_FIELD(0x0, 0x1, 11), |
@@ -215,7 +215,7 @@ static struct clkgen_quadfs_data st_fs660c32_E_416 = { | |||
215 | .get_rate = clk_fs660c32_dig_get_rate, | 215 | .get_rate = clk_fs660c32_dig_get_rate, |
216 | }; | 216 | }; |
217 | 217 | ||
218 | static struct clkgen_quadfs_data st_fs660c32_F_416 = { | 218 | static const struct clkgen_quadfs_data st_fs660c32_F_416 = { |
219 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), | 219 | .npda = CLKGEN_FIELD(0x0, 0x1, 14), |
220 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), | 220 | .nsb = { CLKGEN_FIELD(0x0, 0x1, 10), |
221 | CLKGEN_FIELD(0x0, 0x1, 11), | 221 | CLKGEN_FIELD(0x0, 0x1, 11), |
@@ -650,7 +650,7 @@ static int quadfs_fsynth_is_enabled(struct clk_hw *hw) | |||
650 | 650 | ||
651 | #define P15 (uint64_t)(1 << 15) | 651 | #define P15 (uint64_t)(1 << 15) |
652 | 652 | ||
653 | static int clk_fs216c65_get_rate(unsigned long input, struct stm_fs *fs, | 653 | static int clk_fs216c65_get_rate(unsigned long input, const struct stm_fs *fs, |
654 | unsigned long *rate) | 654 | unsigned long *rate) |
655 | { | 655 | { |
656 | uint64_t res; | 656 | uint64_t res; |
@@ -670,7 +670,7 @@ static int clk_fs216c65_get_rate(unsigned long input, struct stm_fs *fs, | |||
670 | return 0; | 670 | return 0; |
671 | } | 671 | } |
672 | 672 | ||
673 | static int clk_fs432c65_get_rate(unsigned long input, struct stm_fs *fs, | 673 | static int clk_fs432c65_get_rate(unsigned long input, const struct stm_fs *fs, |
674 | unsigned long *rate) | 674 | unsigned long *rate) |
675 | { | 675 | { |
676 | uint64_t res; | 676 | uint64_t res; |
@@ -693,7 +693,7 @@ static int clk_fs432c65_get_rate(unsigned long input, struct stm_fs *fs, | |||
693 | #define P20 (uint64_t)(1 << 20) | 693 | #define P20 (uint64_t)(1 << 20) |
694 | 694 | ||
695 | static int clk_fs660c32_dig_get_rate(unsigned long input, | 695 | static int clk_fs660c32_dig_get_rate(unsigned long input, |
696 | struct stm_fs *fs, unsigned long *rate) | 696 | const struct stm_fs *fs, unsigned long *rate) |
697 | { | 697 | { |
698 | unsigned long s = (1 << fs->sdiv); | 698 | unsigned long s = (1 << fs->sdiv); |
699 | unsigned long ns; | 699 | unsigned long ns; |
@@ -749,7 +749,7 @@ static long quadfs_find_best_rate(struct clk_hw *hw, unsigned long drate, | |||
749 | { | 749 | { |
750 | struct st_clk_quadfs_fsynth *fs = to_quadfs_fsynth(hw); | 750 | struct st_clk_quadfs_fsynth *fs = to_quadfs_fsynth(hw); |
751 | int (*clk_fs_get_rate)(unsigned long , | 751 | int (*clk_fs_get_rate)(unsigned long , |
752 | struct stm_fs *, unsigned long *); | 752 | const struct stm_fs *, unsigned long *); |
753 | struct stm_fs prev_params; | 753 | struct stm_fs prev_params; |
754 | unsigned long prev_rate, rate = 0; | 754 | unsigned long prev_rate, rate = 0; |
755 | unsigned long diff_rate, prev_diff_rate = ~0; | 755 | unsigned long diff_rate, prev_diff_rate = ~0; |
@@ -793,7 +793,7 @@ static unsigned long quadfs_recalc_rate(struct clk_hw *hw, | |||
793 | unsigned long rate = 0; | 793 | unsigned long rate = 0; |
794 | struct stm_fs params; | 794 | struct stm_fs params; |
795 | int (*clk_fs_get_rate)(unsigned long , | 795 | int (*clk_fs_get_rate)(unsigned long , |
796 | struct stm_fs *, unsigned long *); | 796 | const struct stm_fs *, unsigned long *); |
797 | 797 | ||
798 | clk_fs_get_rate = fs->data->get_rate; | 798 | clk_fs_get_rate = fs->data->get_rate; |
799 | 799 | ||