clk: st: Support for PLLs inside ClockGenA(s)

The patch supports the c65/c32 type PLLs used by ClockGenA(s)

PLL clock : It includes support for all c65/c32 type PLLs
inside ClockGenA(s) : implemented as Fixed Parent / Fixed Rate clock,
with clock rate calculated reading H/w settings done at BOOT.

c65 PLLs have 2 outputs : HS and LS
c32 PLLs have 1-4 outputs : ODFx

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

1 files changed, 48 insertions, 0 deletions

diff --git a/drivers/clk/st/clkgen.h b/drivers/clk/st/clkgen.h
new file mode 100644
index 000000000000..35c863295268
--- /dev/null
+++ b/drivers/clk/st/clkgen.h
@@ -0,0 +1,48 @@
+/************************************************************************
+File  : Clock H/w specific Information
+
+Author: Pankaj Dev <pankaj.dev@st.com>
+
+Copyright (C) 2014 STMicroelectronics
+************************************************************************/
+
+#ifndef __CLKGEN_INFO_H
+#define __CLKGEN_INFO_H
+
+struct clkgen_field {
+        unsigned int offset;
+        unsigned int mask;
+        unsigned int shift;
+};
+
+static inline unsigned long clkgen_read(void __iomem    *base,
+                                          struct clkgen_field *field)
+{
+        return (readl(base + field->offset) >> field->shift) & field->mask;
+}
+
+
+static inline void clkgen_write(void __iomem *base, struct clkgen_field *field,
+                                  unsigned long val)
+{
+        writel((readl(base + field->offset) &
+               ~(field->mask << field->shift)) | (val << field->shift),
+               base + field->offset);
+
+        return;
+}
+
+#define CLKGEN_FIELD(_offset, _mask, _shift) {          \
+                                .offset = _offset,      \
+                                .mask   = _mask,        \
+                                .shift  = _shift,       \
+                                }
+
+#define CLKGEN_READ(pll, field) clkgen_read(pll->regs_base, \
+                &pll->data->field)
+
+#define CLKGEN_WRITE(pll, field, val) clkgen_write(pll->regs_base, \
+                &pll->data->field, val)
+
+#endif /*__CLKGEN_INFO_H*/
+