clk: samsung: pll: Add support for rate configuration of PLL46xx

This patch implements round_rate and set_rate callbacks of PLL46xx
driver to allow reconfiguration of PLL at runtime.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

1 files changed, 25 insertions, 0 deletions

diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h
index f3c85bf9cfaf..6c39030080fb 100644
--- a/drivers/clk/samsung/clk-pll.h
+++ b/drivers/clk/samsung/clk-pll.h
@@ -53,6 +53,28 @@ enum samsung_pll_type {
                 .afc    =       (_afc),                         \
         }
 
+#define PLL_4600_RATE(_rate, _m, _p, _s, _k, _vsel)             \
+        {                                                       \
+                .rate   =       (_rate),                        \
+                .mdiv   =       (_m),                           \
+                .pdiv   =       (_p),                           \
+                .sdiv   =       (_s),                           \
+                .kdiv   =       (_k),                           \
+                .vsel   =       (_vsel),                        \
+        }
+
+#define PLL_4650_RATE(_rate, _m, _p, _s, _k, _mfr, _mrr, _vsel) \
+        {                                                       \
+                .rate   =       (_rate),                        \
+                .mdiv   =       (_m),                           \
+                .pdiv   =       (_p),                           \
+                .sdiv   =       (_s),                           \
+                .kdiv   =       (_k),                           \
+                .mfr    =       (_mfr),                         \
+                .mrr    =       (_mrr),                         \
+                .vsel   =       (_vsel),                        \
+        }
+
 /* NOTE: Rate table should be kept sorted in descending order. */
 
 struct samsung_pll_rate_table {
@@ -62,6 +84,9 @@ struct samsung_pll_rate_table {
         unsigned int sdiv;
         unsigned int kdiv;
         unsigned int afc;
+        unsigned int mfr;
+        unsigned int mrr;
+        unsigned int vsel;
 };
 
 extern struct clk * __init samsung_clk_register_pll2550x(const char *name,