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authorTomasz Figa <t.figa@samsung.com>2013-04-04 00:33:02 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-04-04 02:51:09 -0400
commita8b5a39ecbbe5b00554b5025af4464abe12bfcd8 (patch)
tree1a71ecec6edca52cdf37913b46016eefa2d924c4 /drivers/clk/samsung/clk-pll.c
parente77ba804c103db5380d182aaa83af4566699fca1 (diff)
clk: samsung: Remove unimplemented ops for pll
Unimplemented clock operations should be simply omitted instead of returning error values. This patch removes unimplemented PLL operations to fix problems caused by returning error code in round_rate callback. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/clk/samsung/clk-pll.c')
-rw-r--r--drivers/clk/samsung/clk-pll.c80
1 files changed, 0 insertions, 80 deletions
diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index 4b2451129d44..89135f6be116 100644
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -49,24 +49,8 @@ static unsigned long samsung_pll35xx_recalc_rate(struct clk_hw *hw,
49 return (unsigned long)fvco; 49 return (unsigned long)fvco;
50} 50}
51 51
52/* todo: implement pl35xx clock round rate operation */
53static long samsung_pll35xx_round_rate(struct clk_hw *hw,
54 unsigned long drate, unsigned long *prate)
55{
56 return -ENOTSUPP;
57}
58
59/* todo: implement pl35xx clock set rate */
60static int samsung_pll35xx_set_rate(struct clk_hw *hw, unsigned long drate,
61 unsigned long prate)
62{
63 return -ENOTSUPP;
64}
65
66static const struct clk_ops samsung_pll35xx_clk_ops = { 52static const struct clk_ops samsung_pll35xx_clk_ops = {
67 .recalc_rate = samsung_pll35xx_recalc_rate, 53 .recalc_rate = samsung_pll35xx_recalc_rate,
68 .round_rate = samsung_pll35xx_round_rate,
69 .set_rate = samsung_pll35xx_set_rate,
70}; 54};
71 55
72struct clk * __init samsung_clk_register_pll35xx(const char *name, 56struct clk * __init samsung_clk_register_pll35xx(const char *name,
@@ -144,24 +128,8 @@ static unsigned long samsung_pll36xx_recalc_rate(struct clk_hw *hw,
144 return (unsigned long)fvco; 128 return (unsigned long)fvco;
145} 129}
146 130
147/* todo: implement pl36xx clock round rate operation */
148static long samsung_pll36xx_round_rate(struct clk_hw *hw,
149 unsigned long drate, unsigned long *prate)
150{
151 return -ENOTSUPP;
152}
153
154/* todo: implement pl36xx clock set rate */
155static int samsung_pll36xx_set_rate(struct clk_hw *hw, unsigned long drate,
156 unsigned long prate)
157{
158 return -ENOTSUPP;
159}
160
161static const struct clk_ops samsung_pll36xx_clk_ops = { 131static const struct clk_ops samsung_pll36xx_clk_ops = {
162 .recalc_rate = samsung_pll36xx_recalc_rate, 132 .recalc_rate = samsung_pll36xx_recalc_rate,
163 .round_rate = samsung_pll36xx_round_rate,
164 .set_rate = samsung_pll36xx_set_rate,
165}; 133};
166 134
167struct clk * __init samsung_clk_register_pll36xx(const char *name, 135struct clk * __init samsung_clk_register_pll36xx(const char *name,
@@ -239,24 +207,8 @@ static unsigned long samsung_pll45xx_recalc_rate(struct clk_hw *hw,
239 return (unsigned long)fvco; 207 return (unsigned long)fvco;
240} 208}
241 209
242/* todo: implement pl45xx clock round rate operation */
243static long samsung_pll45xx_round_rate(struct clk_hw *hw,
244 unsigned long drate, unsigned long *prate)
245{
246 return -ENOTSUPP;
247}
248
249/* todo: implement pl45xx clock set rate */
250static int samsung_pll45xx_set_rate(struct clk_hw *hw, unsigned long drate,
251 unsigned long prate)
252{
253 return -ENOTSUPP;
254}
255
256static const struct clk_ops samsung_pll45xx_clk_ops = { 210static const struct clk_ops samsung_pll45xx_clk_ops = {
257 .recalc_rate = samsung_pll45xx_recalc_rate, 211 .recalc_rate = samsung_pll45xx_recalc_rate,
258 .round_rate = samsung_pll45xx_round_rate,
259 .set_rate = samsung_pll45xx_set_rate,
260}; 212};
261 213
262struct clk * __init samsung_clk_register_pll45xx(const char *name, 214struct clk * __init samsung_clk_register_pll45xx(const char *name,
@@ -342,24 +294,8 @@ static unsigned long samsung_pll46xx_recalc_rate(struct clk_hw *hw,
342 return (unsigned long)fvco; 294 return (unsigned long)fvco;
343} 295}
344 296
345/* todo: implement pl46xx clock round rate operation */
346static long samsung_pll46xx_round_rate(struct clk_hw *hw,
347 unsigned long drate, unsigned long *prate)
348{
349 return -ENOTSUPP;
350}
351
352/* todo: implement pl46xx clock set rate */
353static int samsung_pll46xx_set_rate(struct clk_hw *hw, unsigned long drate,
354 unsigned long prate)
355{
356 return -ENOTSUPP;
357}
358
359static const struct clk_ops samsung_pll46xx_clk_ops = { 297static const struct clk_ops samsung_pll46xx_clk_ops = {
360 .recalc_rate = samsung_pll46xx_recalc_rate, 298 .recalc_rate = samsung_pll46xx_recalc_rate,
361 .round_rate = samsung_pll46xx_round_rate,
362 .set_rate = samsung_pll46xx_set_rate,
363}; 299};
364 300
365struct clk * __init samsung_clk_register_pll46xx(const char *name, 301struct clk * __init samsung_clk_register_pll46xx(const char *name,
@@ -441,24 +377,8 @@ static unsigned long samsung_pll2550x_recalc_rate(struct clk_hw *hw,
441 return (unsigned long)fvco; 377 return (unsigned long)fvco;
442} 378}
443 379
444/* todo: implement pl2550x clock round rate operation */
445static long samsung_pll2550x_round_rate(struct clk_hw *hw,
446 unsigned long drate, unsigned long *prate)
447{
448 return -ENOTSUPP;
449}
450
451/* todo: implement pl2550x clock set rate */
452static int samsung_pll2550x_set_rate(struct clk_hw *hw, unsigned long drate,
453 unsigned long prate)
454{
455 return -ENOTSUPP;
456}
457
458static const struct clk_ops samsung_pll2550x_clk_ops = { 380static const struct clk_ops samsung_pll2550x_clk_ops = {
459 .recalc_rate = samsung_pll2550x_recalc_rate, 381 .recalc_rate = samsung_pll2550x_recalc_rate,
460 .round_rate = samsung_pll2550x_round_rate,
461 .set_rate = samsung_pll2550x_set_rate,
462}; 382};
463 383
464struct clk * __init samsung_clk_register_pll2550x(const char *name, 384struct clk * __init samsung_clk_register_pll2550x(const char *name,