clk: mmp: add spin lock for clk-frac

The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c
index f81799987451..993abcdb32cc 100644
--- a/drivers/clk/mmp/clk-pxa910.c
+++ b/drivers/clk/mmp/clk-pxa910.c
@@ -163,7 +163,7 @@ void __init pxa910_clk_init(void)
         uart_pll =  mmp_clk_register_factor("uart_pll", "pll1_4", 0,
                                 mpmu_base + MPMU_UART_PLL,
                                 &uart_factor_masks, uart_factor_tbl,
-                                ARRAY_SIZE(uart_factor_tbl));
+                                ARRAY_SIZE(uart_factor_tbl), &clk_lock);
         clk_set_rate(uart_pll, 14745600);
         clk_register_clkdev(uart_pll, "uart_pll", NULL);