clk: gate: add CLK_GATE_HIWORD_MASK

In Rockchip Cortex-A9 based chips, they don't use paradigm of
reading-changing-writing the register contents.  Instead they
use a hiword mask to indicate the changed bits.

When b1 should be set as gate, it also needs to indicate the change
by setting hiword mask (b1 << 16).

The patch adds gate flag for this usage.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

1 files changed, 19 insertions, 6 deletions

diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 15114febfd92..790306e921c8 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -53,12 +53,18 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
         if (gate->lock)
                 spin_lock_irqsave(gate->lock, flags);
 
-        reg = readl(gate->reg);
-
-        if (set)
-                reg |= BIT(gate->bit_idx);
-        else
-                reg &= ~BIT(gate->bit_idx);
+        if (gate->flags & CLK_GATE_HIWORD_MASK) {
+                reg = BIT(gate->bit_idx + 16);
+                if (set)
+                        reg |= BIT(gate->bit_idx);
+        } else {
+                reg = readl(gate->reg);
+
+                if (set)
+                        reg |= BIT(gate->bit_idx);
+                else
+                        reg &= ~BIT(gate->bit_idx);
+        }
 
         writel(reg, gate->reg);
 
@@ -121,6 +127,13 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
         struct clk *clk;
         struct clk_init_data init;
 
+        if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
+                if (bit_idx > 16) {
+                        pr_err("gate bit exceeds LOWORD field\n");
+                        return ERR_PTR(-EINVAL);
+                }
+        }
+
         /* allocate the gate */
         gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
         if (!gate) {