radeon: set the address to access the GART table on the CPU side correctly

This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
This fixes issues seen on some r400 cards. (bugs.freedesktop.org 9957)

Signed-off-by: Dave Airlie <airlied@redhat.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 335423c5c186..24fca8ec1379 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -1679,7 +1679,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
                         dev_priv->gart_info.bus_addr =
                             dev_priv->pcigart_offset + dev_priv->fb_location;
                         dev_priv->gart_info.mapping.offset =
-                            dev_priv->gart_info.bus_addr;
+                            dev_priv->pcigart_offset + dev_priv->fb_aper_offset;
                         dev_priv->gart_info.mapping.size =
                             dev_priv->gart_info.table_size;
 
@@ -2275,7 +2275,8 @@ int radeon_driver_firstopen(struct drm_device *dev)
         if (ret != 0)
                 return ret;
 
-        ret = drm_addmap(dev, drm_get_resource_start(dev, 0),
+        dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0);
+        ret = drm_addmap(dev, dev_priv->fb_aper_offset,
                          drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER,
                          _DRM_WRITE_COMBINING, &map);
         if (ret != 0)